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treewide: Move the dri2 extension to Xext and use it for all X servers

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This is needed to get proton working in Xfbdev, but is probably useful in other places too.

Xephyr has some unrelated issues regaring Xinput, so steam doesn't work there.

Signed-off-by: stefan11111 <stefan11111@shitposting.expert>
This commit is contained in:
stefan11111
2026-01-01 13:42:08 +02:00
committed by Enrico Weigelt
parent 2a41522349
commit dc39eda42b
26 changed files with 47 additions and 61 deletions
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1736
Xext/dri2/dri2.c Normal file
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/*
* Copyright © 2007 Red Hat, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Soft-
* ware"), to deal in the Software without restriction, including without
* limitation the rights to use, copy, modify, merge, publish, distribute,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, provided that the above copyright
* notice(s) and this permission notice appear in all copies of the Soft-
* ware and that both the above copyright notice(s) and this permission
* notice appear in supporting documentation.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABIL-
* ITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF THIRD PARTY
* RIGHTS. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR HOLDERS INCLUDED IN
* THIS NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL INDIRECT OR CONSE-
* QUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFOR-
* MANCE OF THIS SOFTWARE.
*
* Except as contained in this notice, the name of a copyright holder shall
* not be used in advertising or otherwise to promote the sale, use or
* other dealings in this Software without prior written authorization of
* the copyright holder.
*
* Authors:
* Kristian Høgsberg (krh@redhat.com)
*/
#ifndef _DRI2_H_
#define _DRI2_H_
#include <X11/extensions/dri2tokens.h>
/* Version 2 structure (with format at the end) */
typedef struct {
unsigned int attachment;
unsigned int name;
unsigned int pitch;
unsigned int cpp;
unsigned int flags;
unsigned int format;
void *driverPrivate;
} DRI2BufferRec, *DRI2BufferPtr;
typedef DRI2BufferRec DRI2Buffer2Rec, *DRI2Buffer2Ptr;
typedef void (*DRI2SwapEventPtr) (ClientPtr client, void *data, int type,
CARD64 ust, CARD64 msc, CARD32 sbc);
typedef DRI2BufferPtr(*DRI2CreateBuffersProcPtr) (DrawablePtr pDraw,
unsigned int *attachments,
int count);
typedef void (*DRI2DestroyBuffersProcPtr) (DrawablePtr pDraw,
DRI2BufferPtr buffers, int count);
typedef void (*DRI2CopyRegionProcPtr) (DrawablePtr pDraw,
RegionPtr pRegion,
DRI2BufferPtr pDestBuffer,
DRI2BufferPtr pSrcBuffer);
typedef void (*DRI2WaitProcPtr) (WindowPtr pWin, unsigned int sequence);
typedef int (*DRI2AuthMagicProcPtr) (int fd, uint32_t magic);
typedef int (*DRI2AuthMagic2ProcPtr) (ScreenPtr pScreen, uint32_t magic);
/**
* Schedule a buffer swap
*
* This callback is used to support glXSwapBuffers and the OML_sync_control
* extension (see it for a description of the params).
*
* Drivers should queue an event for the frame count that satisfies the
* parameters passed in. If the event is in the future (i.e. the conditions
* aren't currently satisfied), the server may block the client at the next
* GLX request using DRI2WaitSwap. When the event arrives, drivers should call
* \c DRI2SwapComplete, which will handle waking the client and returning
* the appropriate data.
*
* The DDX is responsible for doing a flip, exchange, or blit of the swap
* when the corresponding event arrives. The \c DRI2CanFlip and
* \c DRI2CanExchange functions can be used as helpers for this purpose.
*
* \param client client pointer (used for block/unblock)
* \param pDraw drawable whose count we want
* \param pDestBuffer current front buffer
* \param pSrcBuffer current back buffer
* \param target_msc frame count to wait for
* \param divisor divisor for condition equation
* \param remainder remainder for division equation
* \param func function to call when the swap completes
* \param data data for the callback \p func.
*/
typedef int (*DRI2ScheduleSwapProcPtr) (ClientPtr client,
DrawablePtr pDraw,
DRI2BufferPtr pDestBuffer,
DRI2BufferPtr pSrcBuffer,
CARD64 * target_msc,
CARD64 divisor,
CARD64 remainder,
DRI2SwapEventPtr func, void *data);
typedef DRI2BufferPtr(*DRI2CreateBufferProcPtr) (DrawablePtr pDraw,
unsigned int attachment,
unsigned int format);
typedef void (*DRI2DestroyBufferProcPtr) (DrawablePtr pDraw,
DRI2BufferPtr buffer);
/**
* Notifies driver when DRI2GetBuffers reuses a dri2 buffer.
*
* Driver may rename the dri2 buffer in this notify if it is required.
*
* \param pDraw drawable whose count we want
* \param buffer buffer that will be returned to client
*/
typedef void (*DRI2ReuseBufferNotifyProcPtr) (DrawablePtr pDraw,
DRI2BufferPtr buffer);
/**
* Get current media stamp counter values
*
* This callback is used to support the SGI_video_sync and OML_sync_control
* extensions.
*
* Drivers should return the current frame counter and the timestamp from
* when the returned frame count was last incremented.
*
* The count should correspond to the screen where the drawable is currently
* visible. If the drawable isn't visible (e.g. redirected), the server
* should return BadDrawable to the client, pending GLX spec updates to
* define this behavior.
*
* \param pDraw drawable whose count we want
* \param ust timestamp from when the count was last incremented.
* \param mst current frame count
*/
typedef int (*DRI2GetMSCProcPtr) (DrawablePtr pDraw, CARD64 * ust,
CARD64 * msc);
/**
* Schedule a frame count related wait
*
* This callback is used to support the SGI_video_sync and OML_sync_control
* extensions. See those specifications for details on how to handle
* the divisor and remainder parameters.
*
* Drivers should queue an event for the frame count that satisfies the
* parameters passed in. If the event is in the future (i.e. the conditions
* aren't currently satisfied), the driver should block the client using
* \c DRI2BlockClient. When the event arrives, drivers should call
* \c DRI2WaitMSCComplete, which will handle waking the client and returning
* the appropriate data.
*
* \param client client pointer (used for block/unblock)
* \param pDraw drawable whose count we want
* \param target_msc frame count to wait for
* \param divisor divisor for condition equation
* \param remainder remainder for division equation
*/
typedef int (*DRI2ScheduleWaitMSCProcPtr) (ClientPtr client,
DrawablePtr pDraw,
CARD64 target_msc,
CARD64 divisor, CARD64 remainder);
typedef void (*DRI2InvalidateProcPtr) (DrawablePtr pDraw, void *data, XID id);
/**
* DRI2 calls this hook when ever swap_limit is going to be changed. Default
* implementation for the hook only accepts one as swap_limit. If driver can
* support other swap_limits it has to implement supported limits with this
* callback.
*
* \param pDraw drawable whose swap_limit is going to be changed
* \param swap_limit new swap_limit that going to be set
* \return TRUE if limit is support, FALSE if not.
*/
typedef Bool (*DRI2SwapLimitValidateProcPtr) (DrawablePtr pDraw,
int swap_limit);
typedef DRI2BufferPtr(*DRI2CreateBuffer2ProcPtr) (ScreenPtr pScreen,
DrawablePtr pDraw,
unsigned int attachment,
unsigned int format);
typedef void (*DRI2DestroyBuffer2ProcPtr) (ScreenPtr pScreen, DrawablePtr pDraw,
DRI2BufferPtr buffer);
typedef void (*DRI2CopyRegion2ProcPtr) (ScreenPtr pScreen, DrawablePtr pDraw,
RegionPtr pRegion,
DRI2BufferPtr pDestBuffer,
DRI2BufferPtr pSrcBuffer);
/**
* \brief Get the value of a parameter.
*
* The parameter's \a value is looked up on the screen associated with
* \a pDrawable.
*
* \return \c Success or error code.
*/
typedef int (*DRI2GetParamProcPtr) (ClientPtr client,
DrawablePtr pDrawable,
CARD64 param,
BOOL *is_param_recognized,
CARD64 *value);
/**
* Version of the DRI2InfoRec structure defined in this header
*/
#define DRI2INFOREC_VERSION 9
typedef struct {
unsigned int version; /**< Version of this struct */
int fd;
const char *driverName;
const char *deviceName;
DRI2CreateBufferProcPtr CreateBuffer;
DRI2DestroyBufferProcPtr DestroyBuffer;
DRI2CopyRegionProcPtr CopyRegion;
DRI2WaitProcPtr Wait;
/* added in version 4 */
DRI2ScheduleSwapProcPtr ScheduleSwap;
DRI2GetMSCProcPtr GetMSC;
DRI2ScheduleWaitMSCProcPtr ScheduleWaitMSC;
/* number of drivers in the driverNames array */
unsigned int numDrivers;
/* array of driver names, indexed by DRI2Driver* driver types */
/* a name of NULL means that driver is not supported */
const char *const *driverNames;
/* added in version 5 */
DRI2AuthMagicProcPtr AuthMagic;
/* added in version 6 */
DRI2ReuseBufferNotifyProcPtr ReuseBufferNotify;
DRI2SwapLimitValidateProcPtr SwapLimitValidate;
/* added in version 7 */
DRI2GetParamProcPtr GetParam;
/* added in version 8 */
/* AuthMagic callback which passes extra context */
/* If this is NULL the AuthMagic callback is used */
/* If this is non-NULL the AuthMagic callback is ignored */
DRI2AuthMagic2ProcPtr AuthMagic2;
/* added in version 9 */
DRI2CreateBuffer2ProcPtr CreateBuffer2;
DRI2DestroyBuffer2ProcPtr DestroyBuffer2;
DRI2CopyRegion2ProcPtr CopyRegion2;
} DRI2InfoRec, *DRI2InfoPtr;
extern _X_EXPORT Bool DRI2ScreenInit(ScreenPtr pScreen, DRI2InfoPtr info);
extern _X_EXPORT void DRI2CloseScreen(ScreenPtr pScreen);
extern _X_EXPORT Bool DRI2HasSwapControl(ScreenPtr pScreen);
extern _X_EXPORT Bool DRI2Connect(ClientPtr client, ScreenPtr pScreen,
unsigned int driverType,
int *fd,
const char **driverName,
const char **deviceName);
extern _X_EXPORT Bool DRI2Authenticate(ClientPtr client, ScreenPtr pScreen, uint32_t magic);
extern _X_EXPORT int DRI2CreateDrawable(ClientPtr client,
DrawablePtr pDraw,
XID id,
DRI2InvalidateProcPtr invalidate,
void *priv);
extern _X_EXPORT int DRI2CreateDrawable2(ClientPtr client,
DrawablePtr pDraw,
XID id,
DRI2InvalidateProcPtr invalidate,
void *priv,
XID *dri2_id_out);
extern _X_EXPORT DRI2BufferPtr *DRI2GetBuffers(DrawablePtr pDraw,
int *width,
int *height,
unsigned int *attachments,
int count, int *out_count);
extern _X_EXPORT int DRI2CopyRegion(DrawablePtr pDraw,
RegionPtr pRegion,
unsigned int dest, unsigned int src);
/**
* Determine the major and minor version of the DRI2 extension.
*
* Provides a mechanism to other modules (e.g., 2D drivers) to determine the
* version of the DRI2 extension. While it is possible to peek directly at
* the \c XF86ModuleData from a layered module, such a module will fail to
* load (due to an unresolved symbol) if the DRI2 extension is not loaded.
*
* \param major Location to store the major version of the DRI2 extension
* \param minor Location to store the minor version of the DRI2 extension
*
* \note
* This interface was added some time after the initial release of the DRI2
* module. Layered modules that wish to use this interface must first test
* its existence by calling \c xf86LoaderCheckSymbol.
*/
extern _X_EXPORT void DRI2Version(int *major, int *minor);
extern _X_EXPORT DRI2BufferPtr *DRI2GetBuffersWithFormat(DrawablePtr pDraw,
int *width,
int *height,
unsigned int
*attachments,
int count,
int *out_count);
extern _X_EXPORT void DRI2SwapInterval(DrawablePtr pDrawable, int interval);
extern _X_EXPORT Bool DRI2SwapLimit(DrawablePtr pDraw, int swap_limit);
extern _X_EXPORT int DRI2SwapBuffers(ClientPtr client, DrawablePtr pDrawable,
CARD64 target_msc, CARD64 divisor,
CARD64 remainder, CARD64 * swap_target,
DRI2SwapEventPtr func, void *data);
extern _X_EXPORT Bool DRI2WaitSwap(ClientPtr client, DrawablePtr pDrawable);
extern _X_EXPORT int DRI2GetMSC(DrawablePtr pDrawable, CARD64 * ust,
CARD64 * msc, CARD64 * sbc);
extern _X_EXPORT int DRI2WaitMSC(ClientPtr client, DrawablePtr pDrawable,
CARD64 target_msc, CARD64 divisor,
CARD64 remainder);
extern _X_EXPORT int ProcDRI2WaitMSCReply(ClientPtr client, CARD64 ust,
CARD64 msc, CARD64 sbc);
extern _X_EXPORT int DRI2WaitSBC(ClientPtr client, DrawablePtr pDraw,
CARD64 target_sbc);
extern _X_EXPORT Bool DRI2ThrottleClient(ClientPtr client, DrawablePtr pDraw);
extern _X_EXPORT Bool DRI2CanFlip(DrawablePtr pDraw);
extern _X_EXPORT Bool DRI2CanExchange(DrawablePtr pDraw);
/* Note: use *only* for MSC related waits */
extern _X_EXPORT void DRI2BlockClient(ClientPtr client, DrawablePtr pDraw);
extern _X_EXPORT void DRI2SwapComplete(ClientPtr client, DrawablePtr pDraw,
int frame, unsigned int tv_sec,
unsigned int tv_usec, int type,
DRI2SwapEventPtr swap_complete,
void *swap_data);
extern _X_EXPORT void DRI2WaitMSCComplete(ClientPtr client, DrawablePtr pDraw,
int frame, unsigned int tv_sec,
unsigned int tv_usec);
extern _X_EXPORT int DRI2GetParam(ClientPtr client,
DrawablePtr pDrawable,
CARD64 param,
BOOL *is_param_recognized,
CARD64 *value);
extern _X_EXPORT DrawablePtr DRI2UpdatePrime(DrawablePtr pDraw, DRI2BufferPtr pDest);
#endif

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/* SPDX-License-Identifier: MIT OR X11
*
* Copyright © 2024 Enrico Weigelt, metux IT consult <info@metux.net>
*/
#ifndef _XSERVER_DRI2_PRIV_H_
#define _XSERVER_DRI2_PRIV_H_
#include "dri2.h"
extern CARD8 dri2_major; /* version of DRI2 supported by DDX */
extern CARD8 dri2_minor;
#endif /* _XSERVER_DRI2_PRIV_H_ */

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Xext/dri2/dri2ext.c Normal file
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/*
* Copyright © 2008 Red Hat, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Soft-
* ware"), to deal in the Software without restriction, including without
* limitation the rights to use, copy, modify, merge, publish, distribute,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, provided that the above copyright
* notice(s) and this permission notice appear in all copies of the Soft-
* ware and that both the above copyright notice(s) and this permission
* notice appear in supporting documentation.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABIL-
* ITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF THIRD PARTY
* RIGHTS. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR HOLDERS INCLUDED IN
* THIS NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL INDIRECT OR CONSE-
* QUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFOR-
* MANCE OF THIS SOFTWARE.
*
* Except as contained in this notice, the name of a copyright holder shall
* not be used in advertising or otherwise to promote the sale, use or
* other dealings in this Software without prior written authorization of
* the copyright holder.
*
* Authors:
* Kristian Høgsberg (krh@redhat.com)
*/
#include <dix-config.h>
#include <X11/X.h>
#include <X11/Xproto.h>
#include <X11/extensions/dri2proto.h>
#include <X11/extensions/xfixeswire.h>
#include "dix/dix_priv.h"
#include "dix/request_priv.h"
#include "include/extinit.h"
#include "dixstruct.h"
#include "scrnintstr.h"
#include "pixmapstr.h"
#include "extnsionst.h"
#include "xfixes.h"
#include "dri2_priv.h"
#include "dri2int.h"
#include "protocol-versions.h"
/* For the static extension loader */
Bool noDRI2Extension = FALSE;
void DRI2ExtensionInit(void);
static int DRI2EventBase;
static Bool
validDrawable(ClientPtr client, XID drawable, Mask access_mode,
DrawablePtr *pDrawable, int *status)
{
*status = dixLookupDrawable(pDrawable, drawable, client,
M_DRAWABLE_WINDOW | M_DRAWABLE_PIXMAP,
access_mode);
if (*status != Success) {
client->errorValue = drawable;
return FALSE;
}
return TRUE;
}
static int
ProcDRI2QueryVersion(ClientPtr client)
{
xDRI2QueryVersionReply reply = {
.majorVersion = dri2_major,
.minorVersion = dri2_minor
};
REQUEST_SIZE_MATCH(xDRI2QueryVersionReq);
if (client->swapped) {
swapl(&reply.majorVersion);
swapl(&reply.minorVersion);
}
return X_SEND_REPLY_SIMPLE(client, reply);
}
static int
ProcDRI2Connect(ClientPtr client)
{
REQUEST(xDRI2ConnectReq);
DrawablePtr pDraw;
int fd, status;
const char *driverName;
const char *deviceName;
REQUEST_SIZE_MATCH(xDRI2ConnectReq);
if (!validDrawable(client, stuff->window, DixGetAttrAccess,
&pDraw, &status))
return status;
x_rpcbuf_t rpcbuf = { .swapped = client->swapped, .err_clear = TRUE };
xDRI2ConnectReply reply = { 0 };
if (DRI2Connect(client, pDraw->pScreen,
stuff->driverType, &fd, &driverName, &deviceName)) {
reply.driverNameLength = strlen(driverName);
reply.deviceNameLength = strlen(deviceName);
x_rpcbuf_write_string_pad(&rpcbuf, driverName);
x_rpcbuf_write_string_pad(&rpcbuf, deviceName);
}
return X_SEND_REPLY_WITH_RPCBUF(client, reply, rpcbuf);
}
static int
ProcDRI2Authenticate(ClientPtr client)
{
REQUEST(xDRI2AuthenticateReq);
DrawablePtr pDraw;
int status;
REQUEST_SIZE_MATCH(xDRI2AuthenticateReq);
if (!validDrawable(client, stuff->window, DixGetAttrAccess,
&pDraw, &status))
return status;
xDRI2AuthenticateReply reply = {
.authenticated = DRI2Authenticate(client, pDraw->pScreen, stuff->magic)
};
return X_SEND_REPLY_SIMPLE(client, reply);
}
static void
DRI2InvalidateBuffersEvent(DrawablePtr pDraw, void *priv, XID id)
{
ClientPtr client = priv;
xDRI2InvalidateBuffers event = {
.type = DRI2EventBase + DRI2_InvalidateBuffers,
.drawable = id
};
WriteEventsToClient(client, 1, (xEvent *) &event);
}
static int
ProcDRI2CreateDrawable(ClientPtr client)
{
REQUEST(xDRI2CreateDrawableReq);
DrawablePtr pDrawable;
int status;
REQUEST_SIZE_MATCH(xDRI2CreateDrawableReq);
if (!validDrawable(client, stuff->drawable, DixAddAccess,
&pDrawable, &status))
return status;
status = DRI2CreateDrawable(client, pDrawable, stuff->drawable,
DRI2InvalidateBuffersEvent, client);
if (status != Success)
return status;
return Success;
}
static int
ProcDRI2DestroyDrawable(ClientPtr client)
{
REQUEST(xDRI2DestroyDrawableReq);
DrawablePtr pDrawable;
int status;
REQUEST_SIZE_MATCH(xDRI2DestroyDrawableReq);
if (!validDrawable(client, stuff->drawable, DixRemoveAccess,
&pDrawable, &status))
return status;
return Success;
}
static int
send_buffers_reply(ClientPtr client, DrawablePtr pDrawable,
DRI2BufferPtr * buffers, int count, int width, int height)
{
int skip = 0;
int i;
if (buffers == NULL)
return BadAlloc;
if (pDrawable->type == DRAWABLE_WINDOW) {
for (i = 0; i < count; i++) {
/* Do not send the real front buffer of a window to the client.
*/
if (buffers[i]->attachment == DRI2BufferFrontLeft) {
skip++;
continue;
}
}
}
xDRI2GetBuffersReply reply = {
.width = width,
.height = height,
.count = count - skip
};
x_rpcbuf_t rpcbuf = { .swapped = client->swapped, .err_clear = TRUE };
for (i = 0; i < count; i++) {
xDRI2Buffer buffer;
/* Do not send the real front buffer of a window to the client.
*/
if ((pDrawable->type == DRAWABLE_WINDOW)
&& (buffers[i]->attachment == DRI2BufferFrontLeft)) {
continue;
}
buffer.attachment = buffers[i]->attachment;
buffer.name = buffers[i]->name;
buffer.pitch = buffers[i]->pitch;
buffer.cpp = buffers[i]->cpp;
buffer.flags = buffers[i]->flags;
x_rpcbuf_write_binary_pad(&rpcbuf, &buffer, sizeof(xDRI2Buffer));
}
return X_SEND_REPLY_WITH_RPCBUF(client, reply, rpcbuf);
}
static int
ProcDRI2GetBuffers(ClientPtr client)
{
REQUEST(xDRI2GetBuffersReq);
DrawablePtr pDrawable;
DRI2BufferPtr *buffers;
int status, width, height, count;
unsigned int *attachments;
REQUEST_AT_LEAST_SIZE(xDRI2GetBuffersReq);
/* stuff->count is a count of CARD32 attachments that follows */
if (stuff->count > (INT_MAX / sizeof(CARD32)))
return BadLength;
REQUEST_FIXED_SIZE(xDRI2GetBuffersReq, stuff->count * sizeof(CARD32));
if (!validDrawable(client, stuff->drawable, DixReadAccess | DixWriteAccess,
&pDrawable, &status))
return status;
if (DRI2ThrottleClient(client, pDrawable))
return Success;
attachments = (unsigned int *) &stuff[1];
buffers = DRI2GetBuffers(pDrawable, &width, &height,
attachments, stuff->count, &count);
return send_buffers_reply(client, pDrawable, buffers, count, width, height);
}
static int
ProcDRI2GetBuffersWithFormat(ClientPtr client)
{
REQUEST(xDRI2GetBuffersReq);
DrawablePtr pDrawable;
DRI2BufferPtr *buffers;
int status, width, height, count;
unsigned int *attachments;
REQUEST_AT_LEAST_SIZE(xDRI2GetBuffersReq);
/* stuff->count is a count of pairs of CARD32s (attachments & formats)
that follows */
if (stuff->count > (INT_MAX / (2 * sizeof(CARD32))))
return BadLength;
REQUEST_FIXED_SIZE(xDRI2GetBuffersReq,
stuff->count * (2 * sizeof(CARD32)));
if (!validDrawable(client, stuff->drawable, DixReadAccess | DixWriteAccess,
&pDrawable, &status))
return status;
if (DRI2ThrottleClient(client, pDrawable))
return Success;
attachments = (unsigned int *) &stuff[1];
buffers = DRI2GetBuffersWithFormat(pDrawable, &width, &height,
attachments, stuff->count, &count);
return send_buffers_reply(client, pDrawable, buffers, count, width, height);
}
static int
ProcDRI2CopyRegion(ClientPtr client)
{
REQUEST(xDRI2CopyRegionReq);
DrawablePtr pDrawable;
int status;
RegionPtr pRegion;
REQUEST_SIZE_MATCH(xDRI2CopyRegionReq);
if (!validDrawable(client, stuff->drawable, DixWriteAccess,
&pDrawable, &status))
return status;
VERIFY_REGION(pRegion, stuff->region, client, DixReadAccess);
status = DRI2CopyRegion(pDrawable, pRegion, stuff->dest, stuff->src);
if (status != Success)
return status;
/* CopyRegion needs to be a round trip to make sure the X server
* queues the swap buffer rendering commands before the DRI client
* continues rendering. The reply has a bitmask to signal the
* presence of optional return values as well, but we're not using
* that yet.
*/
xDRI2CopyRegionReply reply = { 0 };
return X_SEND_REPLY_SIMPLE(client, reply);
}
static CARD64
vals_to_card64(CARD32 lo, CARD32 hi)
{
return (CARD64) hi << 32 | lo;
}
static void
DRI2SwapEvent(ClientPtr client, void *data, int type, CARD64 ust, CARD64 msc,
CARD32 sbc)
{
DrawablePtr pDrawable = data;
xDRI2BufferSwapComplete2 event = {
.type = DRI2EventBase + DRI2_BufferSwapComplete,
.event_type = type,
.drawable = pDrawable->id,
.ust_hi = (CARD64) ust >> 32,
.ust_lo = ust & 0xffffffff,
.msc_hi = (CARD64) msc >> 32,
.msc_lo = msc & 0xffffffff,
.sbc = sbc
};
WriteEventsToClient(client, 1, (xEvent *) &event);
}
static int
ProcDRI2SwapBuffers(ClientPtr client)
{
REQUEST(xDRI2SwapBuffersReq);
DrawablePtr pDrawable;
CARD64 target_msc, divisor, remainder, swap_target;
int status;
REQUEST_SIZE_MATCH(xDRI2SwapBuffersReq);
if (!validDrawable(client, stuff->drawable,
DixReadAccess | DixWriteAccess, &pDrawable, &status))
return status;
/*
* Ensures an out of control client can't exhaust our swap queue, and
* also orders swaps.
*/
if (DRI2ThrottleClient(client, pDrawable))
return Success;
target_msc = vals_to_card64(stuff->target_msc_lo, stuff->target_msc_hi);
divisor = vals_to_card64(stuff->divisor_lo, stuff->divisor_hi);
remainder = vals_to_card64(stuff->remainder_lo, stuff->remainder_hi);
status = DRI2SwapBuffers(client, pDrawable, target_msc, divisor, remainder,
&swap_target, DRI2SwapEvent, pDrawable);
if (status != Success)
return BadDrawable;
xDRI2SwapBuffersReply reply = { 0 };
reply.swap_hi = swap_target >> 32;
reply.swap_lo = swap_target & 0xffffffff;
return X_SEND_REPLY_SIMPLE(client, reply);
}
static void
load_msc_reply(xDRI2MSCReply * rep, CARD64 ust, CARD64 msc, CARD64 sbc)
{
rep->ust_hi = ust >> 32;
rep->ust_lo = ust & 0xffffffff;
rep->msc_hi = msc >> 32;
rep->msc_lo = msc & 0xffffffff;
rep->sbc_hi = sbc >> 32;
rep->sbc_lo = sbc & 0xffffffff;
}
static int
ProcDRI2GetMSC(ClientPtr client)
{
REQUEST(xDRI2GetMSCReq);
DrawablePtr pDrawable;
CARD64 ust, msc, sbc;
int status;
REQUEST_SIZE_MATCH(xDRI2GetMSCReq);
if (!validDrawable(client, stuff->drawable, DixReadAccess, &pDrawable,
&status))
return status;
status = DRI2GetMSC(pDrawable, &ust, &msc, &sbc);
if (status != Success)
return status;
xDRI2MSCReply reply = { 0 };
load_msc_reply(&reply, ust, msc, sbc);
return X_SEND_REPLY_SIMPLE(client, reply);
}
static int
ProcDRI2WaitMSC(ClientPtr client)
{
REQUEST(xDRI2WaitMSCReq);
DrawablePtr pDrawable;
CARD64 target, divisor, remainder;
int status;
/* FIXME: in restart case, client may be gone at this point */
REQUEST_SIZE_MATCH(xDRI2WaitMSCReq);
if (!validDrawable(client, stuff->drawable, DixReadAccess, &pDrawable,
&status))
return status;
target = vals_to_card64(stuff->target_msc_lo, stuff->target_msc_hi);
divisor = vals_to_card64(stuff->divisor_lo, stuff->divisor_hi);
remainder = vals_to_card64(stuff->remainder_lo, stuff->remainder_hi);
status = DRI2WaitMSC(client, pDrawable, target, divisor, remainder);
if (status != Success)
return status;
return Success;
}
int
ProcDRI2WaitMSCReply(ClientPtr client, CARD64 ust, CARD64 msc, CARD64 sbc)
{
xDRI2MSCReply reply = { 0 };
load_msc_reply(&reply, ust, msc, sbc);
return X_SEND_REPLY_SIMPLE(client, reply);
}
static int
ProcDRI2SwapInterval(ClientPtr client)
{
REQUEST(xDRI2SwapIntervalReq);
DrawablePtr pDrawable;
int status;
/* FIXME: in restart case, client may be gone at this point */
REQUEST_SIZE_MATCH(xDRI2SwapIntervalReq);
if (!validDrawable(client, stuff->drawable, DixReadAccess | DixWriteAccess,
&pDrawable, &status))
return status;
DRI2SwapInterval(pDrawable, stuff->interval);
return Success;
}
static int
ProcDRI2WaitSBC(ClientPtr client)
{
REQUEST(xDRI2WaitSBCReq);
DrawablePtr pDrawable;
CARD64 target;
int status;
REQUEST_SIZE_MATCH(xDRI2WaitSBCReq);
if (!validDrawable(client, stuff->drawable, DixReadAccess, &pDrawable,
&status))
return status;
target = vals_to_card64(stuff->target_sbc_lo, stuff->target_sbc_hi);
status = DRI2WaitSBC(client, pDrawable, target);
return status;
}
static int
ProcDRI2GetParam(ClientPtr client)
{
REQUEST(xDRI2GetParamReq);
DrawablePtr pDrawable;
CARD64 value;
int status;
REQUEST_SIZE_MATCH(xDRI2GetParamReq);
if (!validDrawable(client, stuff->drawable, DixReadAccess,
&pDrawable, &status))
return status;
xDRI2GetParamReply reply = { 0 };
status = DRI2GetParam(client, pDrawable, stuff->param,
&reply.is_param_recognized, &value);
reply.value_hi = value >> 32;
reply.value_lo = value & 0xffffffff;
if (status != Success)
return status;
return X_SEND_REPLY_SIMPLE(client, reply);
}
static int
ProcDRI2Dispatch(ClientPtr client)
{
REQUEST(xReq);
switch (stuff->data) {
case X_DRI2QueryVersion:
return ProcDRI2QueryVersion(client);
}
if (!client->local)
return BadRequest;
switch (stuff->data) {
case X_DRI2Connect:
return ProcDRI2Connect(client);
case X_DRI2Authenticate:
return ProcDRI2Authenticate(client);
case X_DRI2CreateDrawable:
return ProcDRI2CreateDrawable(client);
case X_DRI2DestroyDrawable:
return ProcDRI2DestroyDrawable(client);
case X_DRI2GetBuffers:
return ProcDRI2GetBuffers(client);
case X_DRI2CopyRegion:
return ProcDRI2CopyRegion(client);
case X_DRI2GetBuffersWithFormat:
return ProcDRI2GetBuffersWithFormat(client);
case X_DRI2SwapBuffers:
return ProcDRI2SwapBuffers(client);
case X_DRI2GetMSC:
return ProcDRI2GetMSC(client);
case X_DRI2WaitMSC:
return ProcDRI2WaitMSC(client);
case X_DRI2WaitSBC:
return ProcDRI2WaitSBC(client);
case X_DRI2SwapInterval:
return ProcDRI2SwapInterval(client);
case X_DRI2GetParam:
return ProcDRI2GetParam(client);
default:
return BadRequest;
}
}
void
DRI2ExtensionInit(void)
{
ExtensionEntry *dri2Extension;
#ifdef XINERAMA
if (!noPanoramiXExtension)
return;
#endif /* XINERAMA */
dri2Extension = AddExtension(DRI2_NAME,
DRI2NumberEvents,
DRI2NumberErrors,
ProcDRI2Dispatch,
ProcDRI2Dispatch,
NULL,
StandardMinorOpcode);
DRI2EventBase = dri2Extension->eventBase;
DRI2ModuleSetup();
}

31
Xext/dri2/dri2int.h Normal file
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@@ -0,0 +1,31 @@
/*
* Copyright © 2011 Daniel Stone
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Author: Daniel Stone <daniel@fooishbar.org>
*/
#ifndef XSERVER_XFREE86_DRI2INT_H
#define XSERVER_XFREE86_DRI2INT_H
extern Bool DRI2ModuleSetup(void);
#endif /* XSERVER_XFREE86_DRI2INT_H */

18
Xext/dri2/meson.build Normal file
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@@ -0,0 +1,18 @@
srcs_dri2 = [
'dri2.c',
'dri2ext.c',
]
libxserver_dri2 = []
if build_dri2
libxserver_dri2 = static_library('xserver_dri2',
srcs_dri2,
include_directories: inc,
dependencies: [ common_dep, libdrm_dep ],
)
endif
if build_xorg
install_data('dri2.h', install_dir: xorgsdkdir)
endif

4
Xext/dri2/pci_ids/i810_pci_ids.h Normal file
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@@ -0,0 +1,4 @@
CHIPSET(0x7121, I810, i8xx)
CHIPSET(0x7123, I810_DC100, i8xx)
CHIPSET(0x7125, I810_E, i8xx)
CHIPSET(0x1132, I815, i8xx)

15
Xext/dri2/pci_ids/i915_pci_ids.h Normal file
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@@ -0,0 +1,15 @@
CHIPSET(0x3577, I830_M, "Intel(R) 830M")
CHIPSET(0x2562, 845_G, "Intel(R) 845G")
CHIPSET(0x3582, I855_GM, "Intel(R) 852GM/855GM")
CHIPSET(0x2572, I865_G, "Intel(R) 865G")
CHIPSET(0x2582, I915_G, "Intel(R) 915G")
CHIPSET(0x258A, E7221_G, "Intel(R) E7221G (i915)")
CHIPSET(0x2592, I915_GM, "Intel(R) 915GM")
CHIPSET(0x2772, I945_G, "Intel(R) 945G")
CHIPSET(0x27A2, I945_GM, "Intel(R) 945GM")
CHIPSET(0x27AE, I945_GME, "Intel(R) 945GME")
CHIPSET(0x29B2, Q35_G, "Intel(R) Q35")
CHIPSET(0x29C2, G33_G, "Intel(R) G33")
CHIPSET(0x29D2, Q33_G, "Intel(R) Q33")
CHIPSET(0xA011, PNV_GM, "Intel(R) Pineview M")
CHIPSET(0xA001, PNV_G, "Intel(R) Pineview")

250
Xext/dri2/pci_ids/i965_pci_ids.h Normal file
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@@ -0,0 +1,250 @@
CHIPSET(0x29A2, i965, "Intel(R) 965G")
CHIPSET(0x2992, i965, "Intel(R) 965Q")
CHIPSET(0x2982, i965, "Intel(R) 965G")
CHIPSET(0x2972, i965, "Intel(R) 946GZ")
CHIPSET(0x2A02, i965, "Intel(R) 965GM")
CHIPSET(0x2A12, i965, "Intel(R) 965GME/GLE")
CHIPSET(0x2A42, g4x, "Mobile Intel® GM45 Express Chipset")
CHIPSET(0x2E02, g4x, "Intel(R) Integrated Graphics Device")
CHIPSET(0x2E12, g4x, "Intel(R) Q45/Q43")
CHIPSET(0x2E22, g4x, "Intel(R) G45/G43")
CHIPSET(0x2E32, g4x, "Intel(R) G41")
CHIPSET(0x2E42, g4x, "Intel(R) B43")
CHIPSET(0x2E92, g4x, "Intel(R) B43")
CHIPSET(0x0042, ilk, "Intel(R) Ironlake Desktop")
CHIPSET(0x0046, ilk, "Intel(R) Ironlake Mobile")
CHIPSET(0x0102, snb_gt1, "Intel(R) Sandybridge Desktop")
CHIPSET(0x0112, snb_gt2, "Intel(R) Sandybridge Desktop")
CHIPSET(0x0122, snb_gt2, "Intel(R) Sandybridge Desktop")
CHIPSET(0x0106, snb_gt1, "Intel(R) Sandybridge Mobile")
CHIPSET(0x0116, snb_gt2, "Intel(R) Sandybridge Mobile")
CHIPSET(0x0126, snb_gt2, "Intel(R) Sandybridge Mobile")
CHIPSET(0x010A, snb_gt1, "Intel(R) Sandybridge Server")
CHIPSET(0x0152, ivb_gt1, "Intel(R) Ivybridge Desktop")
CHIPSET(0x0162, ivb_gt2, "Intel(R) Ivybridge Desktop")
CHIPSET(0x0156, ivb_gt1, "Intel(R) Ivybridge Mobile")
CHIPSET(0x0166, ivb_gt2, "Intel(R) Ivybridge Mobile")
CHIPSET(0x015a, ivb_gt1, "Intel(R) Ivybridge Server")
CHIPSET(0x016a, ivb_gt2, "Intel(R) Ivybridge Server")
CHIPSET(0x0402, hsw_gt1, "Intel(R) Haswell Desktop")
CHIPSET(0x0412, hsw_gt2, "Intel(R) Haswell Desktop")
CHIPSET(0x0422, hsw_gt3, "Intel(R) Haswell Desktop")
CHIPSET(0x0406, hsw_gt1, "Intel(R) Haswell Mobile")
CHIPSET(0x0416, hsw_gt2, "Intel(R) Haswell Mobile")
CHIPSET(0x0426, hsw_gt3, "Intel(R) Haswell Mobile")
CHIPSET(0x040A, hsw_gt1, "Intel(R) Haswell Server")
CHIPSET(0x041A, hsw_gt2, "Intel(R) Haswell Server")
CHIPSET(0x042A, hsw_gt3, "Intel(R) Haswell Server")
CHIPSET(0x040B, hsw_gt1, "Intel(R) Haswell")
CHIPSET(0x041B, hsw_gt2, "Intel(R) Haswell")
CHIPSET(0x042B, hsw_gt3, "Intel(R) Haswell")
CHIPSET(0x040E, hsw_gt1, "Intel(R) Haswell")
CHIPSET(0x041E, hsw_gt2, "Intel(R) Haswell")
CHIPSET(0x042E, hsw_gt3, "Intel(R) Haswell")
CHIPSET(0x0C02, hsw_gt1, "Intel(R) Haswell Desktop")
CHIPSET(0x0C12, hsw_gt2, "Intel(R) Haswell Desktop")
CHIPSET(0x0C22, hsw_gt3, "Intel(R) Haswell Desktop")
CHIPSET(0x0C06, hsw_gt1, "Intel(R) Haswell Mobile")
CHIPSET(0x0C16, hsw_gt2, "Intel(R) Haswell Mobile")
CHIPSET(0x0C26, hsw_gt3, "Intel(R) Haswell Mobile")
CHIPSET(0x0C0A, hsw_gt1, "Intel(R) Haswell Server")
CHIPSET(0x0C1A, hsw_gt2, "Intel(R) Haswell Server")
CHIPSET(0x0C2A, hsw_gt3, "Intel(R) Haswell Server")
CHIPSET(0x0C0B, hsw_gt1, "Intel(R) Haswell")
CHIPSET(0x0C1B, hsw_gt2, "Intel(R) Haswell")
CHIPSET(0x0C2B, hsw_gt3, "Intel(R) Haswell")
CHIPSET(0x0C0E, hsw_gt1, "Intel(R) Haswell")
CHIPSET(0x0C1E, hsw_gt2, "Intel(R) Haswell")
CHIPSET(0x0C2E, hsw_gt3, "Intel(R) Haswell")
CHIPSET(0x0A02, hsw_gt1, "Intel(R) Haswell Desktop")
CHIPSET(0x0A12, hsw_gt2, "Intel(R) Haswell Desktop")
CHIPSET(0x0A22, hsw_gt3, "Intel(R) Haswell Desktop")
CHIPSET(0x0A06, hsw_gt1, "Intel(R) Haswell Mobile")
CHIPSET(0x0A16, hsw_gt2, "Intel(R) Haswell Mobile")
CHIPSET(0x0A26, hsw_gt3, "Intel(R) Haswell Mobile")
CHIPSET(0x0A0A, hsw_gt1, "Intel(R) Haswell Server")
CHIPSET(0x0A1A, hsw_gt2, "Intel(R) Haswell Server")
CHIPSET(0x0A2A, hsw_gt3, "Intel(R) Haswell Server")
CHIPSET(0x0A0B, hsw_gt1, "Intel(R) Haswell")
CHIPSET(0x0A1B, hsw_gt2, "Intel(R) Haswell")
CHIPSET(0x0A2B, hsw_gt3, "Intel(R) Haswell")
CHIPSET(0x0A0E, hsw_gt1, "Intel(R) Haswell")
CHIPSET(0x0A1E, hsw_gt2, "Intel(R) Haswell")
CHIPSET(0x0A2E, hsw_gt3, "Intel(R) Haswell")
CHIPSET(0x0D02, hsw_gt1, "Intel(R) Haswell Desktop")
CHIPSET(0x0D12, hsw_gt2, "Intel(R) Haswell Desktop")
CHIPSET(0x0D22, hsw_gt3, "Intel(R) Haswell Desktop")
CHIPSET(0x0D06, hsw_gt1, "Intel(R) Haswell Mobile")
CHIPSET(0x0D16, hsw_gt2, "Intel(R) Haswell Mobile")
CHIPSET(0x0D26, hsw_gt3, "Intel(R) Haswell Mobile")
CHIPSET(0x0D0A, hsw_gt1, "Intel(R) Haswell Server")
CHIPSET(0x0D1A, hsw_gt2, "Intel(R) Haswell Server")
CHIPSET(0x0D2A, hsw_gt3, "Intel(R) Haswell")
CHIPSET(0x0D0B, hsw_gt1, "Intel(R) Haswell")
CHIPSET(0x0D1B, hsw_gt2, "Intel(R) Haswell")
CHIPSET(0x0D2B, hsw_gt3, "Intel(R) Haswell")
CHIPSET(0x0D0E, hsw_gt1, "Intel(R) Haswell")
CHIPSET(0x0D1E, hsw_gt2, "Intel(R) Haswell")
CHIPSET(0x0D2E, hsw_gt3, "Intel(R) Haswell")
CHIPSET(0x0F31, byt, "Intel(R) Bay Trail")
CHIPSET(0x0F32, byt, "Intel(R) Bay Trail")
CHIPSET(0x0F33, byt, "Intel(R) Bay Trail")
CHIPSET(0x0157, byt, "Intel(R) Bay Trail")
CHIPSET(0x0155, byt, "Intel(R) Bay Trail")
CHIPSET(0x22B0, chv, "Intel(R) HD Graphics (Cherrytrail)")
CHIPSET(0x22B1, chv, "Intel(R) HD Graphics XXX (Braswell)") /* Overridden in brw_get_renderer_string */
CHIPSET(0x22B2, chv, "Intel(R) HD Graphics (Cherryview)")
CHIPSET(0x22B3, chv, "Intel(R) HD Graphics (Cherryview)")
CHIPSET(0x1602, bdw_gt1, "Intel(R) Broadwell GT1")
CHIPSET(0x1606, bdw_gt1, "Intel(R) Broadwell GT1")
CHIPSET(0x160A, bdw_gt1, "Intel(R) Broadwell GT1")
CHIPSET(0x160B, bdw_gt1, "Intel(R) Broadwell GT1")
CHIPSET(0x160D, bdw_gt1, "Intel(R) Broadwell GT1")
CHIPSET(0x160E, bdw_gt1, "Intel(R) Broadwell GT1")
CHIPSET(0x1612, bdw_gt2, "Intel(R) HD Graphics 5600 (Broadwell GT2)")
CHIPSET(0x1616, bdw_gt2, "Intel(R) HD Graphics 5500 (Broadwell GT2)")
CHIPSET(0x161A, bdw_gt2, "Intel(R) Broadwell GT2")
CHIPSET(0x161B, bdw_gt2, "Intel(R) Broadwell GT2")
CHIPSET(0x161D, bdw_gt2, "Intel(R) Broadwell GT2")
CHIPSET(0x161E, bdw_gt2, "Intel(R) HD Graphics 5300 (Broadwell GT2)")
CHIPSET(0x1622, bdw_gt3, "Intel(R) Iris Pro 6200 (Broadwell GT3e)")
CHIPSET(0x1626, bdw_gt3, "Intel(R) HD Graphics 6000 (Broadwell GT3)")
CHIPSET(0x162A, bdw_gt3, "Intel(R) Iris Pro P6300 (Broadwell GT3e)")
CHIPSET(0x162B, bdw_gt3, "Intel(R) Iris 6100 (Broadwell GT3)")
CHIPSET(0x162D, bdw_gt3, "Intel(R) Broadwell GT3")
CHIPSET(0x162E, bdw_gt3, "Intel(R) Broadwell GT3")
CHIPSET(0x1902, skl_gt1, "Intel(R) HD Graphics 510 (Skylake GT1)")
CHIPSET(0x1906, skl_gt1, "Intel(R) HD Graphics 510 (Skylake GT1)")
CHIPSET(0x190A, skl_gt1, "Intel(R) Skylake GT1")
CHIPSET(0x190B, skl_gt1, "Intel(R) HD Graphics 510 (Skylake GT1)")
CHIPSET(0x190E, skl_gt1, "Intel(R) Skylake GT1")
CHIPSET(0x1912, skl_gt2, "Intel(R) HD Graphics 530 (Skylake GT2)")
CHIPSET(0x1913, skl_gt2, "Intel(R) Skylake GT2f")
CHIPSET(0x1915, skl_gt2, "Intel(R) Skylake GT2f")
CHIPSET(0x1916, skl_gt2, "Intel(R) HD Graphics 520 (Skylake GT2)")
CHIPSET(0x1917, skl_gt2, "Intel(R) Skylake GT2f")
CHIPSET(0x191A, skl_gt2, "Intel(R) Skylake GT2")
CHIPSET(0x191B, skl_gt2, "Intel(R) HD Graphics 530 (Skylake GT2)")
CHIPSET(0x191D, skl_gt2, "Intel(R) HD Graphics P530 (Skylake GT2)")
CHIPSET(0x191E, skl_gt2, "Intel(R) HD Graphics 515 (Skylake GT2)")
CHIPSET(0x1921, skl_gt2, "Intel(R) HD Graphics 520 (Skylake GT2)")
CHIPSET(0x1923, skl_gt3, "Intel(R) Skylake GT3e")
CHIPSET(0x1926, skl_gt3, "Intel(R) Iris Graphics 540 (Skylake GT3e)")
CHIPSET(0x1927, skl_gt3, "Intel(R) Iris Graphics 550 (Skylake GT3e)")
CHIPSET(0x192A, skl_gt4, "Intel(R) Skylake GT4")
CHIPSET(0x192B, skl_gt3, "Intel(R) Iris Graphics 555 (Skylake GT3e)")
CHIPSET(0x192D, skl_gt3, "Intel(R) Iris Graphics P555 (Skylake GT3e)")
CHIPSET(0x1932, skl_gt4, "Intel(R) Iris Pro Graphics 580 (Skylake GT4e)")
CHIPSET(0x193A, skl_gt4, "Intel(R) Iris Pro Graphics P580 (Skylake GT4e)")
CHIPSET(0x193B, skl_gt4, "Intel(R) Iris Pro Graphics 580 (Skylake GT4e)")
CHIPSET(0x193D, skl_gt4, "Intel(R) Iris Pro Graphics P580 (Skylake GT4e)")
CHIPSET(0x0A84, bxt, "Intel(R) HD Graphics (Broxton)")
CHIPSET(0x1A84, bxt, "Intel(R) HD Graphics (Broxton)")
CHIPSET(0x1A85, bxt_2x6, "Intel(R) HD Graphics (Broxton 2x6)")
CHIPSET(0x5A84, bxt, "Intel(R) HD Graphics 505 (Broxton)")
CHIPSET(0x5A85, bxt_2x6, "Intel(R) HD Graphics 500 (Broxton 2x6)")
CHIPSET(0x5902, kbl_gt1, "Intel(R) HD Graphics 610 (Kaby Lake GT1)")
CHIPSET(0x5906, kbl_gt1, "Intel(R) HD Graphics 610 (Kaby Lake GT1)")
CHIPSET(0x590A, kbl_gt1, "Intel(R) Kabylake GT1")
CHIPSET(0x5908, kbl_gt1, "Intel(R) Kabylake GT1")
CHIPSET(0x590B, kbl_gt1, "Intel(R) Kabylake GT1")
CHIPSET(0x590E, kbl_gt1, "Intel(R) Kabylake GT1")
CHIPSET(0x5913, kbl_gt1_5, "Intel(R) Kabylake GT1.5")
CHIPSET(0x5915, kbl_gt1_5, "Intel(R) Kabylake GT1.5")
CHIPSET(0x5917, kbl_gt2, "Intel(R) UHD Graphics 620 (Kabylake GT2)")
CHIPSET(0x5912, kbl_gt2, "Intel(R) HD Graphics 630 (Kaby Lake GT2)")
CHIPSET(0x5916, kbl_gt2, "Intel(R) HD Graphics 620 (Kaby Lake GT2)")
CHIPSET(0x591A, kbl_gt2, "Intel(R) HD Graphics P630 (Kaby Lake GT2)")
CHIPSET(0x591B, kbl_gt2, "Intel(R) HD Graphics 630 (Kaby Lake GT2)")
CHIPSET(0x591D, kbl_gt2, "Intel(R) HD Graphics P630 (Kaby Lake GT2)")
CHIPSET(0x591E, kbl_gt2, "Intel(R) HD Graphics 615 (Kaby Lake GT2)")
CHIPSET(0x5921, kbl_gt2, "Intel(R) Kabylake GT2F")
CHIPSET(0x5923, kbl_gt3, "Intel(R) Kabylake GT3")
CHIPSET(0x5926, kbl_gt3, "Intel(R) Iris Plus Graphics 640 (Kaby Lake GT3e)")
CHIPSET(0x5927, kbl_gt3, "Intel(R) Iris Plus Graphics 650 (Kaby Lake GT3e)")
CHIPSET(0x593B, kbl_gt4, "Intel(R) Kabylake GT4")
CHIPSET(0x591C, kbl_gt2, "Intel(R) Amber Lake (Kabylake) GT2")
CHIPSET(0x87C0, kbl_gt2, "Intel(R) Amber Lake (Kabylake) GT2")
CHIPSET(0x87CA, cfl_gt2, "Intel(R) Amber Lake (Coffeelake) GT2")
CHIPSET(0x3184, glk, "Intel(R) UHD Graphics 605 (Geminilake)")
CHIPSET(0x3185, glk_2x6, "Intel(R) UHD Graphics 600 (Geminilake 2x6)")
CHIPSET(0x3E90, cfl_gt1, "Intel(R) UHD Graphics 610 (Coffeelake 2x6 GT1)")
CHIPSET(0x3E93, cfl_gt1, "Intel(R) UHD Graphics 610 (Coffeelake 2x6 GT1)")
CHIPSET(0x3E99, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
CHIPSET(0x3E9C, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
CHIPSET(0x3E91, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
CHIPSET(0x3E92, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
CHIPSET(0x3E96, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
CHIPSET(0x3E98, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
CHIPSET(0x3E9A, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
CHIPSET(0x3E9B, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
CHIPSET(0x3E94, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
CHIPSET(0x3EA9, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
CHIPSET(0x3EA5, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
CHIPSET(0x3EA6, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
CHIPSET(0x3EA7, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
CHIPSET(0x3EA8, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
CHIPSET(0x3EA1, cfl_gt1, "Intel(R) HD Graphics (Whiskey Lake 2x6 GT1)")
CHIPSET(0x3EA4, cfl_gt1, "Intel(R) HD Graphics (Whiskey Lake 3x8 GT1)")
CHIPSET(0x3EA0, cfl_gt2, "Intel(R) HD Graphics (Whiskey Lake 3x8 GT2)")
CHIPSET(0x3EA3, cfl_gt2, "Intel(R) HD Graphics (Whiskey Lake 3x8 GT2)")
CHIPSET(0x3EA2, cfl_gt3, "Intel(R) HD Graphics (Whiskey Lake 3x8 GT3)")
CHIPSET(0x9B21, cfl_gt1, "Intel(R) HD Graphics (Comet Lake 2x6 GT1)")
CHIPSET(0x9BA0, cfl_gt1, "Intel(R) HD Graphics (Comet Lake 2x6 GT1)")
CHIPSET(0x9BA2, cfl_gt1, "Intel(R) HD Graphics (Comet Lake 2x6 GT1)")
CHIPSET(0x9BA4, cfl_gt1, "Intel(R) HD Graphics (Comet Lake 2x6 GT1)")
CHIPSET(0x9BA5, cfl_gt1, "Intel(R) HD Graphics (Comet Lake 2x6 GT1)")
CHIPSET(0x9BA8, cfl_gt1, "Intel(R) HD Graphics (Comet Lake 2x6 GT1)")
CHIPSET(0x9BAA, cfl_gt1, "Intel(R) HD Graphics (Comet Lake 2x6 GT1)")
CHIPSET(0x9BAB, cfl_gt1, "Intel(R) HD Graphics (Comet Lake 2x6 GT1)")
CHIPSET(0x9BAC, cfl_gt1, "Intel(R) HD Graphics (Comet Lake 2x6 GT1)")
CHIPSET(0x9B41, cfl_gt2, "Intel(R) HD Graphics (Comet Lake 3x8 GT2)")
CHIPSET(0x9BC0, cfl_gt2, "Intel(R) HD Graphics (Comet Lake 3x8 GT2)")
CHIPSET(0x9BC2, cfl_gt2, "Intel(R) HD Graphics (Comet Lake 3x8 GT2)")
CHIPSET(0x9BC4, cfl_gt2, "Intel(R) HD Graphics (Comet Lake 3x8 GT2)")
CHIPSET(0x9BC5, cfl_gt2, "Intel(R) HD Graphics (Comet Lake 3x8 GT2)")
CHIPSET(0x9BC8, cfl_gt2, "Intel(R) HD Graphics (Comet Lake 3x8 GT2)")
CHIPSET(0x9BCA, cfl_gt2, "Intel(R) HD Graphics (Comet Lake 3x8 GT2)")
CHIPSET(0x9BCB, cfl_gt2, "Intel(R) HD Graphics (Comet Lake 3x8 GT2)")
CHIPSET(0x9BCC, cfl_gt2, "Intel(R) HD Graphics (Comet Lake 3x8 GT2)")
CHIPSET(0x5A49, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)")
CHIPSET(0x5A4A, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)")
CHIPSET(0x5A41, cnl_3x8, "Intel(R) HD Graphics (Cannonlake 3x8 GT1)")
CHIPSET(0x5A42, cnl_3x8, "Intel(R) HD Graphics (Cannonlake 3x8 GT1)")
CHIPSET(0x5A44, cnl_3x8, "Intel(R) HD Graphics (Cannonlake 3x8 GT1)")
CHIPSET(0x5A59, cnl_4x8, "Intel(R) HD Graphics (Cannonlake 4x8 GT1.5)")
CHIPSET(0x5A5A, cnl_4x8, "Intel(R) HD Graphics (Cannonlake 4x8 GT1.5)")
CHIPSET(0x5A5C, cnl_4x8, "Intel(R) HD Graphics (Cannonlake 4x8 GT1.5)")
CHIPSET(0x5A50, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
CHIPSET(0x5A51, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
CHIPSET(0x5A52, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
CHIPSET(0x5A54, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
CHIPSET(0x8A50, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)")
CHIPSET(0x8A51, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)")
CHIPSET(0x8A52, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)")
CHIPSET(0x8A53, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)")
CHIPSET(0x8A54, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
CHIPSET(0x8A56, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
CHIPSET(0x8A57, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
CHIPSET(0x8A58, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
CHIPSET(0x8A59, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
CHIPSET(0x8A5A, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
CHIPSET(0x8A5B, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
CHIPSET(0x8A5C, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
CHIPSET(0x8A5D, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
CHIPSET(0x8A71, icl_1x8, "Intel(R) HD Graphics (Ice Lake 1x8 GT0.5)")
CHIPSET(0x4500, ehl_4x8, "Intel(R) HD Graphics (Elkhart Lake 4x8)")
CHIPSET(0x4571, ehl_4x8, "Intel(R) HD Graphics (Elkhart Lake 4x8)")
CHIPSET(0x4551, ehl_4x4, "Intel(R) HD Graphics (Elkhart Lake 4x4)")
CHIPSET(0x4541, ehl_2x4, "Intel(R) HD Graphics (Elkhart Lake 2x4)")
CHIPSET(0x9A40, tgl_1x6x16, "Intel(R) HD Graphics (Tigerlake 1x6x16 GT2)")
CHIPSET(0x9A49, tgl_1x6x16, "Intel(R) HD Graphics (Tigerlake 1x6x16 GT2)")
CHIPSET(0x9A59, tgl_1x6x16, "Intel(R) HD Graphics (Tigerlake 1x6x16 GT2)")
CHIPSET(0x9A60, tgl_1x2x16, "Intel(R) HD Graphics (Tigerlake 1x2x16 GT1)")
CHIPSET(0x9A68, tgl_1x2x16, "Intel(R) HD Graphics (Tigerlake 1x2x16 GT1)")
CHIPSET(0x9A70, tgl_1x2x16, "Intel(R) HD Graphics (Tigerlake 1x2x16 GT1)")
CHIPSET(0x9A78, tgl_1x2x16, "Intel(R) HD Graphics (Tigerlake 1x2x16 GT1)")
CHIPSET(0x9AC0, tgl_1x2x16, "Intel(R) HD Graphics (Tigerlake 1x2x16 GT2)")
CHIPSET(0x9AC9, tg1_1x2x16, "Intel(R) HD Graphics (Tigerlake 1x2x16 GT2)")
CHIPSET(0x9AD9, tgl_1x2x16, "Intel(R) HD Graphics (Tigerlake 1x2x16 GT2)")
CHIPSET(0x9AF8, tgl_1x2x16, "Intel(R) HD Graphics (Tigerlake 1X2X16 GT2)")

82
Xext/dri2/pci_ids/pci_id_driver_map.h Normal file
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#ifndef _PCI_ID_DRIVER_MAP_H_
#define _PCI_ID_DRIVER_MAP_H_
#include <stddef.h>
#ifndef ARRAY_SIZE
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
#endif
static const int i915_chip_ids[] = {
#define CHIPSET(chip, desc, name) chip,
#include "pci_ids/i915_pci_ids.h"
#undef CHIPSET
};
static const int i965_chip_ids[] = {
#define CHIPSET(chip, family, name) chip,
#include "pci_ids/i965_pci_ids.h"
#undef CHIPSET
};
#ifndef DRIVER_MAP_GALLIUM_ONLY
static const int r100_chip_ids[] = {
#define CHIPSET(chip, name, family) chip,
#include "pci_ids/radeon_pci_ids.h"
#undef CHIPSET
};
static const int r200_chip_ids[] = {
#define CHIPSET(chip, name, family) chip,
#include "pci_ids/r200_pci_ids.h"
#undef CHIPSET
};
#endif
static const int r300_chip_ids[] = {
#define CHIPSET(chip, name, family) chip,
#include "pci_ids/r300_pci_ids.h"
#undef CHIPSET
};
static const int r600_chip_ids[] = {
#define CHIPSET(chip, name, family) chip,
#include "pci_ids/r600_pci_ids.h"
#undef CHIPSET
};
static const int virtio_gpu_chip_ids[] = {
#define CHIPSET(chip, name, family) chip,
#include "pci_ids/virtio_gpu_pci_ids.h"
#undef CHIPSET
};
static const int vmwgfx_chip_ids[] = {
#define CHIPSET(chip, name, family) chip,
#include "pci_ids/vmwgfx_pci_ids.h"
#undef CHIPSET
};
static const struct {
int vendor_id;
const char *driver;
const int *chip_ids;
int num_chips_ids;
} driver_map[] = {
{ 0x8086, "i915", i915_chip_ids, ARRAY_SIZE(i915_chip_ids) },
{ 0x8086, "i965", i965_chip_ids, ARRAY_SIZE(i965_chip_ids) },
{ 0x8086, "i965", NULL, -1 },
#ifndef DRIVER_MAP_GALLIUM_ONLY
{ 0x1002, "radeon", r100_chip_ids, ARRAY_SIZE(r100_chip_ids) },
{ 0x1002, "r200", r200_chip_ids, ARRAY_SIZE(r200_chip_ids) },
#endif
{ 0x1002, "r300", r300_chip_ids, ARRAY_SIZE(r300_chip_ids) },
{ 0x1002, "r600", r600_chip_ids, ARRAY_SIZE(r600_chip_ids) },
{ 0x1002, "radeonsi", NULL, -1 },
{ 0x10de, "nouveau", NULL, -1 },
{ 0x1af4, "virtio_gpu", virtio_gpu_chip_ids, ARRAY_SIZE(virtio_gpu_chip_ids) },
{ 0x15ad, "vmwgfx", vmwgfx_chip_ids, ARRAY_SIZE(vmwgfx_chip_ids) },
{ 0x0000, NULL, NULL, 0 },
};
#endif /* _PCI_ID_DRIVER_MAP_H_ */

24
Xext/dri2/pci_ids/r200_pci_ids.h Normal file
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CHIPSET(0x5148, R200_QH, R200)
CHIPSET(0x514C, R200_QL, R200)
CHIPSET(0x514D, R200_QM, R200)
CHIPSET(0x4242, R200_BB, R200)
CHIPSET(0x4966, RV250_If, RV250)
CHIPSET(0x4967, RV250_Ig, RV250)
CHIPSET(0x4C64, RV250_Ld, RV250)
CHIPSET(0x4C66, RV250_Lf, RV250)
CHIPSET(0x4C67, RV250_Lg, RV250)
CHIPSET(0x4C6E, RV280_4C6E, RV280)
CHIPSET(0x5960, RV280_5960, RV280)
CHIPSET(0x5961, RV280_5961, RV280)
CHIPSET(0x5962, RV280_5962, RV280)
CHIPSET(0x5964, RV280_5964, RV280)
CHIPSET(0x5965, RV280_5965, RV280)
CHIPSET(0x5C61, RV280_5C61, RV280)
CHIPSET(0x5C63, RV280_5C63, RV280)
CHIPSET(0x5834, RS300_5834, RS300)
CHIPSET(0x5835, RS300_5835, RS300)
CHIPSET(0x7834, RS350_7834, RS300)
CHIPSET(0x7835, RS350_7835, RS300)

227
Xext/dri2/pci_ids/r300_pci_ids.h Normal file
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CHIPSET(0x4144, R300_AD, R300)
CHIPSET(0x4145, R300_AE, R300)
CHIPSET(0x4146, R300_AF, R300)
CHIPSET(0x4147, R300_AG, R300)
CHIPSET(0x4E44, R300_ND, R300)
CHIPSET(0x4E45, R300_NE, R300)
CHIPSET(0x4E46, R300_NF, R300)
CHIPSET(0x4E47, R300_NG, R300)
CHIPSET(0x4E48, R350_NH, R350)
CHIPSET(0x4E49, R350_NI, R350)
CHIPSET(0x4E4B, R350_NK, R350)
CHIPSET(0x4148, R350_AH, R350)
CHIPSET(0x4149, R350_AI, R350)
CHIPSET(0x414A, R350_AJ, R350)
CHIPSET(0x414B, R350_AK, R350)
CHIPSET(0x4E4A, R360_NJ, R350)
CHIPSET(0x4150, RV350_AP, RV350)
CHIPSET(0x4151, RV350_AQ, RV350)
CHIPSET(0x4152, RV350_AR, RV350)
CHIPSET(0x4153, RV350_AS, RV350)
CHIPSET(0x4154, RV350_AT, RV350)
CHIPSET(0x4155, RV350_AU, RV350)
CHIPSET(0x4156, RV350_AV, RV350)
CHIPSET(0x4E50, RV350_NP, RV350)
CHIPSET(0x4E51, RV350_NQ, RV350)
CHIPSET(0x4E52, RV350_NR, RV350)
CHIPSET(0x4E53, RV350_NS, RV350)
CHIPSET(0x4E54, RV350_NT, RV350)
CHIPSET(0x4E56, RV350_NV, RV350)
CHIPSET(0x5460, RV370_5460, RV370)
CHIPSET(0x5462, RV370_5462, RV370)
CHIPSET(0x5464, RV370_5464, RV370)
CHIPSET(0x5B60, RV370_5B60, RV370)
CHIPSET(0x5B62, RV370_5B62, RV370)
CHIPSET(0x5B63, RV370_5B63, RV370)
CHIPSET(0x5B64, RV370_5B64, RV370)
CHIPSET(0x5B65, RV370_5B65, RV370)
CHIPSET(0x3150, RV380_3150, RV380)
CHIPSET(0x3151, RV380_3151, RV380)
CHIPSET(0x3152, RV380_3152, RV380)
CHIPSET(0x3154, RV380_3154, RV380)
CHIPSET(0x3155, RV380_3155, RV380)
CHIPSET(0x3E50, RV380_3E50, RV380)
CHIPSET(0x3E54, RV380_3E54, RV380)
CHIPSET(0x4A48, R420_JH, R420)
CHIPSET(0x4A49, R420_JI, R420)
CHIPSET(0x4A4A, R420_JJ, R420)
CHIPSET(0x4A4B, R420_JK, R420)
CHIPSET(0x4A4C, R420_JL, R420)
CHIPSET(0x4A4D, R420_JM, R420)
CHIPSET(0x4A4E, R420_JN, R420)
CHIPSET(0x4A4F, R420_JO, R420)
CHIPSET(0x4A50, R420_JP, R420)
CHIPSET(0x4A54, R420_JT, R420)
CHIPSET(0x5548, R423_UH, R423)
CHIPSET(0x5549, R423_UI, R423)
CHIPSET(0x554A, R423_UJ, R423)
CHIPSET(0x554B, R423_UK, R423)
CHIPSET(0x5550, R423_5550, R423)
CHIPSET(0x5551, R423_UQ, R423)
CHIPSET(0x5552, R423_UR, R423)
CHIPSET(0x5554, R423_UT, R423)
CHIPSET(0x5D57, R423_5D57, R423)
CHIPSET(0x554C, R430_554C, R430)
CHIPSET(0x554D, R430_554D, R430)
CHIPSET(0x554E, R430_554E, R430)
CHIPSET(0x554F, R430_554F, R430)
CHIPSET(0x5D48, R430_5D48, R430)
CHIPSET(0x5D49, R430_5D49, R430)
CHIPSET(0x5D4A, R430_5D4A, R430)
CHIPSET(0x5D4C, R480_5D4C, R480)
CHIPSET(0x5D4D, R480_5D4D, R480)
CHIPSET(0x5D4E, R480_5D4E, R480)
CHIPSET(0x5D4F, R480_5D4F, R480)
CHIPSET(0x5D50, R480_5D50, R480)
CHIPSET(0x5D52, R480_5D52, R480)
CHIPSET(0x4B48, R481_4B48, R481)
CHIPSET(0x4B49, R481_4B49, R481)
CHIPSET(0x4B4A, R481_4B4A, R481)
CHIPSET(0x4B4B, R481_4B4B, R481)
CHIPSET(0x4B4C, R481_4B4C, R481)
CHIPSET(0x564A, RV410_564A, RV410)
CHIPSET(0x564B, RV410_564B, RV410)
CHIPSET(0x564F, RV410_564F, RV410)
CHIPSET(0x5652, RV410_5652, RV410)
CHIPSET(0x5653, RV410_5653, RV410)
CHIPSET(0x5657, RV410_5657, RV410)
CHIPSET(0x5E48, RV410_5E48, RV410)
CHIPSET(0x5E4A, RV410_5E4A, RV410)
CHIPSET(0x5E4B, RV410_5E4B, RV410)
CHIPSET(0x5E4C, RV410_5E4C, RV410)
CHIPSET(0x5E4D, RV410_5E4D, RV410)
CHIPSET(0x5E4F, RV410_5E4F, RV410)
CHIPSET(0x5A41, RS400_5A41, RS400)
CHIPSET(0x5A42, RS400_5A42, RS400)
CHIPSET(0x5A61, RC410_5A61, RC410)
CHIPSET(0x5A62, RC410_5A62, RC410)
CHIPSET(0x5954, RS480_5954, RS480)
CHIPSET(0x5955, RS480_5955, RS480)
CHIPSET(0x5974, RS482_5974, RS480)
CHIPSET(0x5975, RS482_5975, RS480)
CHIPSET(0x7100, R520_7100, R520)
CHIPSET(0x7101, R520_7101, R520)
CHIPSET(0x7102, R520_7102, R520)
CHIPSET(0x7103, R520_7103, R520)
CHIPSET(0x7104, R520_7104, R520)
CHIPSET(0x7105, R520_7105, R520)
CHIPSET(0x7106, R520_7106, R520)
CHIPSET(0x7108, R520_7108, R520)
CHIPSET(0x7109, R520_7109, R520)
CHIPSET(0x710A, R520_710A, R520)
CHIPSET(0x710B, R520_710B, R520)
CHIPSET(0x710C, R520_710C, R520)
CHIPSET(0x710E, R520_710E, R520)
CHIPSET(0x710F, R520_710F, R520)
CHIPSET(0x7140, RV515_7140, RV515)
CHIPSET(0x7141, RV515_7141, RV515)
CHIPSET(0x7142, RV515_7142, RV515)
CHIPSET(0x7143, RV515_7143, RV515)
CHIPSET(0x7144, RV515_7144, RV515)
CHIPSET(0x7145, RV515_7145, RV515)
CHIPSET(0x7146, RV515_7146, RV515)
CHIPSET(0x7147, RV515_7147, RV515)
CHIPSET(0x7149, RV515_7149, RV515)
CHIPSET(0x714A, RV515_714A, RV515)
CHIPSET(0x714B, RV515_714B, RV515)
CHIPSET(0x714C, RV515_714C, RV515)
CHIPSET(0x714D, RV515_714D, RV515)
CHIPSET(0x714E, RV515_714E, RV515)
CHIPSET(0x714F, RV515_714F, RV515)
CHIPSET(0x7151, RV515_7151, RV515)
CHIPSET(0x7152, RV515_7152, RV515)
CHIPSET(0x7153, RV515_7153, RV515)
CHIPSET(0x715E, RV515_715E, RV515)
CHIPSET(0x715F, RV515_715F, RV515)
CHIPSET(0x7180, RV515_7180, RV515)
CHIPSET(0x7181, RV515_7181, RV515)
CHIPSET(0x7183, RV515_7183, RV515)
CHIPSET(0x7186, RV515_7186, RV515)
CHIPSET(0x7187, RV515_7187, RV515)
CHIPSET(0x7188, RV515_7188, RV515)
CHIPSET(0x718A, RV515_718A, RV515)
CHIPSET(0x718B, RV515_718B, RV515)
CHIPSET(0x718C, RV515_718C, RV515)
CHIPSET(0x718D, RV515_718D, RV515)
CHIPSET(0x718F, RV515_718F, RV515)
CHIPSET(0x7193, RV515_7193, RV515)
CHIPSET(0x7196, RV515_7196, RV515)
CHIPSET(0x719B, RV515_719B, RV515)
CHIPSET(0x719F, RV515_719F, RV515)
CHIPSET(0x7200, RV515_7200, RV515)
CHIPSET(0x7210, RV515_7210, RV515)
CHIPSET(0x7211, RV515_7211, RV515)
CHIPSET(0x71C0, RV530_71C0, RV530)
CHIPSET(0x71C1, RV530_71C1, RV530)
CHIPSET(0x71C2, RV530_71C2, RV530)
CHIPSET(0x71C3, RV530_71C3, RV530)
CHIPSET(0x71C4, RV530_71C4, RV530)
CHIPSET(0x71C5, RV530_71C5, RV530)
CHIPSET(0x71C6, RV530_71C6, RV530)
CHIPSET(0x71C7, RV530_71C7, RV530)
CHIPSET(0x71CD, RV530_71CD, RV530)
CHIPSET(0x71CE, RV530_71CE, RV530)
CHIPSET(0x71D2, RV530_71D2, RV530)
CHIPSET(0x71D4, RV530_71D4, RV530)
CHIPSET(0x71D5, RV530_71D5, RV530)
CHIPSET(0x71D6, RV530_71D6, RV530)
CHIPSET(0x71DA, RV530_71DA, RV530)
CHIPSET(0x71DE, RV530_71DE, RV530)
CHIPSET(0x7281, RV560_7281, RV560)
CHIPSET(0x7283, RV560_7283, RV560)
CHIPSET(0x7287, RV560_7287, RV560)
CHIPSET(0x7290, RV560_7290, RV560)
CHIPSET(0x7291, RV560_7291, RV560)
CHIPSET(0x7293, RV560_7293, RV560)
CHIPSET(0x7297, RV560_7297, RV560)
CHIPSET(0x7280, RV570_7280, RV570)
CHIPSET(0x7288, RV570_7288, RV570)
CHIPSET(0x7289, RV570_7289, RV570)
CHIPSET(0x728B, RV570_728B, RV570)
CHIPSET(0x728C, RV570_728C, RV570)
CHIPSET(0x7240, R580_7240, R580)
CHIPSET(0x7243, R580_7243, R580)
CHIPSET(0x7244, R580_7244, R580)
CHIPSET(0x7245, R580_7245, R580)
CHIPSET(0x7246, R580_7246, R580)
CHIPSET(0x7247, R580_7247, R580)
CHIPSET(0x7248, R580_7248, R580)
CHIPSET(0x7249, R580_7249, R580)
CHIPSET(0x724A, R580_724A, R580)
CHIPSET(0x724B, R580_724B, R580)
CHIPSET(0x724C, R580_724C, R580)
CHIPSET(0x724D, R580_724D, R580)
CHIPSET(0x724E, R580_724E, R580)
CHIPSET(0x724F, R580_724F, R580)
CHIPSET(0x7284, R580_7284, R580)
CHIPSET(0x793F, RS600_793F, RS600)
CHIPSET(0x7941, RS600_7941, RS600)
CHIPSET(0x7942, RS600_7942, RS600)
CHIPSET(0x791E, RS690_791E, RS690)
CHIPSET(0x791F, RS690_791F, RS690)
CHIPSET(0x796C, RS740_796C, RS740)
CHIPSET(0x796D, RS740_796D, RS740)
CHIPSET(0x796E, RS740_796E, RS740)
CHIPSET(0x796F, RS740_796F, RS740)

327
Xext/dri2/pci_ids/r600_pci_ids.h Normal file
View File

@@ -0,0 +1,327 @@
CHIPSET(0x9400, R600_9400, R600)
CHIPSET(0x9401, R600_9401, R600)
CHIPSET(0x9402, R600_9402, R600)
CHIPSET(0x9403, R600_9403, R600)
CHIPSET(0x9405, R600_9405, R600)
CHIPSET(0x940A, R600_940A, R600)
CHIPSET(0x940B, R600_940B, R600)
CHIPSET(0x940F, R600_940F, R600)
CHIPSET(0x94C0, RV610_94C0, RV610)
CHIPSET(0x94C1, RV610_94C1, RV610)
CHIPSET(0x94C3, RV610_94C3, RV610)
CHIPSET(0x94C4, RV610_94C4, RV610)
CHIPSET(0x94C5, RV610_94C5, RV610)
CHIPSET(0x94C6, RV610_94C6, RV610)
CHIPSET(0x94C7, RV610_94C7, RV610)
CHIPSET(0x94C8, RV610_94C8, RV610)
CHIPSET(0x94C9, RV610_94C9, RV610)
CHIPSET(0x94CB, RV610_94CB, RV610)
CHIPSET(0x94CC, RV610_94CC, RV610)
CHIPSET(0x94CD, RV610_94CD, RV610)
CHIPSET(0x9580, RV630_9580, RV630)
CHIPSET(0x9581, RV630_9581, RV630)
CHIPSET(0x9583, RV630_9583, RV630)
CHIPSET(0x9586, RV630_9586, RV630)
CHIPSET(0x9587, RV630_9587, RV630)
CHIPSET(0x9588, RV630_9588, RV630)
CHIPSET(0x9589, RV630_9589, RV630)
CHIPSET(0x958A, RV630_958A, RV630)
CHIPSET(0x958B, RV630_958B, RV630)
CHIPSET(0x958C, RV630_958C, RV630)
CHIPSET(0x958D, RV630_958D, RV630)
CHIPSET(0x958E, RV630_958E, RV630)
CHIPSET(0x958F, RV630_958F, RV630)
CHIPSET(0x9500, RV670_9500, RV670)
CHIPSET(0x9501, RV670_9501, RV670)
CHIPSET(0x9504, RV670_9504, RV670)
CHIPSET(0x9505, RV670_9505, RV670)
CHIPSET(0x9506, RV670_9506, RV670)
CHIPSET(0x9507, RV670_9507, RV670)
CHIPSET(0x9508, RV670_9508, RV670)
CHIPSET(0x9509, RV670_9509, RV670)
CHIPSET(0x950F, RV670_950F, RV670)
CHIPSET(0x9511, RV670_9511, RV670)
CHIPSET(0x9515, RV670_9515, RV670)
CHIPSET(0x9517, RV670_9517, RV670)
CHIPSET(0x9519, RV670_9519, RV670)
CHIPSET(0x95C0, RV620_95C0, RV620)
CHIPSET(0x95C2, RV620_95C2, RV620)
CHIPSET(0x95C4, RV620_95C4, RV620)
CHIPSET(0x95C5, RV620_95C5, RV620)
CHIPSET(0x95C6, RV620_95C6, RV620)
CHIPSET(0x95C7, RV620_95C7, RV620)
CHIPSET(0x95C9, RV620_95C9, RV620)
CHIPSET(0x95CC, RV620_95CC, RV620)
CHIPSET(0x95CD, RV620_95CD, RV620)
CHIPSET(0x95CE, RV620_95CE, RV620)
CHIPSET(0x95CF, RV620_95CF, RV620)
CHIPSET(0x9590, RV635_9590, RV635)
CHIPSET(0x9591, RV635_9591, RV635)
CHIPSET(0x9593, RV635_9593, RV635)
CHIPSET(0x9595, RV635_9595, RV635)
CHIPSET(0x9596, RV635_9596, RV635)
CHIPSET(0x9597, RV635_9597, RV635)
CHIPSET(0x9598, RV635_9598, RV635)
CHIPSET(0x9599, RV635_9599, RV635)
CHIPSET(0x959B, RV635_959B, RV635)
CHIPSET(0x9610, RS780_9610, RS780)
CHIPSET(0x9611, RS780_9611, RS780)
CHIPSET(0x9612, RS780_9612, RS780)
CHIPSET(0x9613, RS780_9613, RS780)
CHIPSET(0x9614, RS780_9614, RS780)
CHIPSET(0x9615, RS780_9615, RS780)
CHIPSET(0x9616, RS780_9616, RS780)
CHIPSET(0x9710, RS880_9710, RS880)
CHIPSET(0x9711, RS880_9711, RS880)
CHIPSET(0x9712, RS880_9712, RS880)
CHIPSET(0x9713, RS880_9713, RS880)
CHIPSET(0x9714, RS880_9714, RS880)
CHIPSET(0x9715, RS880_9715, RS880)
CHIPSET(0x9440, RV770_9440, RV770)
CHIPSET(0x9441, RV770_9441, RV770)
CHIPSET(0x9442, RV770_9442, RV770)
CHIPSET(0x9443, RV770_9443, RV770)
CHIPSET(0x9444, RV770_9444, RV770)
CHIPSET(0x9446, RV770_9446, RV770)
CHIPSET(0x944A, RV770_944A, RV770)
CHIPSET(0x944B, RV770_944B, RV770)
CHIPSET(0x944C, RV770_944C, RV770)
CHIPSET(0x944E, RV770_944E, RV770)
CHIPSET(0x9450, RV770_9450, RV770)
CHIPSET(0x9452, RV770_9452, RV770)
CHIPSET(0x9456, RV770_9456, RV770)
CHIPSET(0x945A, RV770_945A, RV770)
CHIPSET(0x945B, RV770_945B, RV770)
CHIPSET(0x945E, RV770_945E, RV770)
CHIPSET(0x9460, RV790_9460, RV770)
CHIPSET(0x9462, RV790_9462, RV770)
CHIPSET(0x946A, RV770_946A, RV770)
CHIPSET(0x946B, RV770_946B, RV770)
CHIPSET(0x947A, RV770_947A, RV770)
CHIPSET(0x947B, RV770_947B, RV770)
CHIPSET(0x9480, RV730_9480, RV730)
CHIPSET(0x9487, RV730_9487, RV730)
CHIPSET(0x9488, RV730_9488, RV730)
CHIPSET(0x9489, RV730_9489, RV730)
CHIPSET(0x948A, RV730_948A, RV730)
CHIPSET(0x948F, RV730_948F, RV730)
CHIPSET(0x9490, RV730_9490, RV730)
CHIPSET(0x9491, RV730_9491, RV730)
CHIPSET(0x9495, RV730_9495, RV730)
CHIPSET(0x9498, RV730_9498, RV730)
CHIPSET(0x949C, RV730_949C, RV730)
CHIPSET(0x949E, RV730_949E, RV730)
CHIPSET(0x949F, RV730_949F, RV730)
CHIPSET(0x9540, RV710_9540, RV710)
CHIPSET(0x9541, RV710_9541, RV710)
CHIPSET(0x9542, RV710_9542, RV710)
CHIPSET(0x954E, RV710_954E, RV710)
CHIPSET(0x954F, RV710_954F, RV710)
CHIPSET(0x9552, RV710_9552, RV710)
CHIPSET(0x9553, RV710_9553, RV710)
CHIPSET(0x9555, RV710_9555, RV710)
CHIPSET(0x9557, RV710_9557, RV710)
CHIPSET(0x955F, RV710_955F, RV710)
CHIPSET(0x94A0, RV740_94A0, RV740)
CHIPSET(0x94A1, RV740_94A1, RV740)
CHIPSET(0x94A3, RV740_94A3, RV740)
CHIPSET(0x94B1, RV740_94B1, RV740)
CHIPSET(0x94B3, RV740_94B3, RV740)
CHIPSET(0x94B4, RV740_94B4, RV740)
CHIPSET(0x94B5, RV740_94B5, RV740)
CHIPSET(0x94B9, RV740_94B9, RV740)
CHIPSET(0x68E0, CEDAR_68E0, CEDAR)
CHIPSET(0x68E1, CEDAR_68E1, CEDAR)
CHIPSET(0x68E4, CEDAR_68E4, CEDAR)
CHIPSET(0x68E5, CEDAR_68E5, CEDAR)
CHIPSET(0x68E8, CEDAR_68E8, CEDAR)
CHIPSET(0x68E9, CEDAR_68E9, CEDAR)
CHIPSET(0x68F1, CEDAR_68F1, CEDAR)
CHIPSET(0x68F2, CEDAR_68F2, CEDAR)
CHIPSET(0x68F8, CEDAR_68F8, CEDAR)
CHIPSET(0x68F9, CEDAR_68F9, CEDAR)
CHIPSET(0x68FA, CEDAR_68FA, CEDAR)
CHIPSET(0x68FE, CEDAR_68FE, CEDAR)
CHIPSET(0x68C0, REDWOOD_68C0, REDWOOD)
CHIPSET(0x68C1, REDWOOD_68C1, REDWOOD)
CHIPSET(0x68C7, REDWOOD_68C7, REDWOOD)
CHIPSET(0x68C8, REDWOOD_68C8, REDWOOD)
CHIPSET(0x68C9, REDWOOD_68C9, REDWOOD)
CHIPSET(0x68D8, REDWOOD_68D8, REDWOOD)
CHIPSET(0x68D9, REDWOOD_68D9, REDWOOD)
CHIPSET(0x68DA, REDWOOD_68DA, REDWOOD)
CHIPSET(0x68DE, REDWOOD_68DE, REDWOOD)
CHIPSET(0x68A0, JUNIPER_68A0, JUNIPER)
CHIPSET(0x68A1, JUNIPER_68A1, JUNIPER)
CHIPSET(0x68A8, JUNIPER_68A8, JUNIPER)
CHIPSET(0x68A9, JUNIPER_68A9, JUNIPER)
CHIPSET(0x68B0, JUNIPER_68B0, JUNIPER)
CHIPSET(0x68B8, JUNIPER_68B8, JUNIPER)
CHIPSET(0x68B9, JUNIPER_68B9, JUNIPER)
CHIPSET(0x68BA, JUNIPER_68BA, JUNIPER)
CHIPSET(0x68BE, JUNIPER_68BE, JUNIPER)
CHIPSET(0x68BF, JUNIPER_68BF, JUNIPER)
CHIPSET(0x6880, CYPRESS_6880, CYPRESS)
CHIPSET(0x6888, CYPRESS_6888, CYPRESS)
CHIPSET(0x6889, CYPRESS_6889, CYPRESS)
CHIPSET(0x688A, CYPRESS_688A, CYPRESS)
CHIPSET(0x688C, CYPRESS_688C, CYPRESS)
CHIPSET(0x688D, CYPRESS_688D, CYPRESS)
CHIPSET(0x6898, CYPRESS_6898, CYPRESS)
CHIPSET(0x6899, CYPRESS_6899, CYPRESS)
CHIPSET(0x689B, CYPRESS_689B, CYPRESS)
CHIPSET(0x689E, CYPRESS_689E, CYPRESS)
CHIPSET(0x689C, HEMLOCK_689C, HEMLOCK)
CHIPSET(0x689D, HEMLOCK_689D, HEMLOCK)
CHIPSET(0x9802, PALM_9802, PALM)
CHIPSET(0x9803, PALM_9803, PALM)
CHIPSET(0x9804, PALM_9804, PALM)
CHIPSET(0x9805, PALM_9805, PALM)
CHIPSET(0x9806, PALM_9806, PALM)
CHIPSET(0x9807, PALM_9807, PALM)
CHIPSET(0x9808, PALM_9808, PALM)
CHIPSET(0x9809, PALM_9809, PALM)
CHIPSET(0x980A, PALM_980A, PALM)
CHIPSET(0x9640, SUMO_9640, SUMO)
CHIPSET(0x9641, SUMO_9641, SUMO)
CHIPSET(0x9642, SUMO2_9642, SUMO2)
CHIPSET(0x9643, SUMO2_9643, SUMO2)
CHIPSET(0x9644, SUMO2_9644, SUMO2)
CHIPSET(0x9645, SUMO2_9645, SUMO2)
CHIPSET(0x9647, SUMO_9647, SUMO)
CHIPSET(0x9648, SUMO_9648, SUMO)
CHIPSET(0x9649, SUMO2_9649, SUMO2)
CHIPSET(0x964a, SUMO_964A, SUMO)
CHIPSET(0x964b, SUMO_964B, SUMO)
CHIPSET(0x964c, SUMO_964C, SUMO)
CHIPSET(0x964e, SUMO_964E, SUMO)
CHIPSET(0x964f, SUMO_964F, SUMO)
CHIPSET(0x6700, CAYMAN_6700, CAYMAN)
CHIPSET(0x6701, CAYMAN_6701, CAYMAN)
CHIPSET(0x6702, CAYMAN_6702, CAYMAN)
CHIPSET(0x6703, CAYMAN_6703, CAYMAN)
CHIPSET(0x6704, CAYMAN_6704, CAYMAN)
CHIPSET(0x6705, CAYMAN_6705, CAYMAN)
CHIPSET(0x6706, CAYMAN_6706, CAYMAN)
CHIPSET(0x6707, CAYMAN_6707, CAYMAN)
CHIPSET(0x6708, CAYMAN_6708, CAYMAN)
CHIPSET(0x6709, CAYMAN_6709, CAYMAN)
CHIPSET(0x6718, CAYMAN_6718, CAYMAN)
CHIPSET(0x6719, CAYMAN_6719, CAYMAN)
CHIPSET(0x671C, CAYMAN_671C, CAYMAN)
CHIPSET(0x671D, CAYMAN_671D, CAYMAN)
CHIPSET(0x671F, CAYMAN_671F, CAYMAN)
CHIPSET(0x6720, BARTS_6720, BARTS)
CHIPSET(0x6721, BARTS_6721, BARTS)
CHIPSET(0x6722, BARTS_6722, BARTS)
CHIPSET(0x6723, BARTS_6723, BARTS)
CHIPSET(0x6724, BARTS_6724, BARTS)
CHIPSET(0x6725, BARTS_6725, BARTS)
CHIPSET(0x6726, BARTS_6726, BARTS)
CHIPSET(0x6727, BARTS_6727, BARTS)
CHIPSET(0x6728, BARTS_6728, BARTS)
CHIPSET(0x6729, BARTS_6729, BARTS)
CHIPSET(0x6738, BARTS_6738, BARTS)
CHIPSET(0x6739, BARTS_6739, BARTS)
CHIPSET(0x673E, BARTS_673E, BARTS)
CHIPSET(0x6740, TURKS_6740, TURKS)
CHIPSET(0x6741, TURKS_6741, TURKS)
CHIPSET(0x6742, TURKS_6742, TURKS)
CHIPSET(0x6743, TURKS_6743, TURKS)
CHIPSET(0x6744, TURKS_6744, TURKS)
CHIPSET(0x6745, TURKS_6745, TURKS)
CHIPSET(0x6746, TURKS_6746, TURKS)
CHIPSET(0x6747, TURKS_6747, TURKS)
CHIPSET(0x6748, TURKS_6748, TURKS)
CHIPSET(0x6749, TURKS_6749, TURKS)
CHIPSET(0x674A, TURKS_674A, TURKS)
CHIPSET(0x6750, TURKS_6750, TURKS)
CHIPSET(0x6751, TURKS_6751, TURKS)
CHIPSET(0x6758, TURKS_6758, TURKS)
CHIPSET(0x6759, TURKS_6759, TURKS)
CHIPSET(0x675B, TURKS_675B, TURKS)
CHIPSET(0x675D, TURKS_675D, TURKS)
CHIPSET(0x675F, TURKS_675F, TURKS)
CHIPSET(0x6840, TURKS_6840, TURKS)
CHIPSET(0x6841, TURKS_6841, TURKS)
CHIPSET(0x6842, TURKS_6842, TURKS)
CHIPSET(0x6843, TURKS_6843, TURKS)
CHIPSET(0x6849, TURKS_6849, TURKS)
CHIPSET(0x6850, TURKS_6850, TURKS)
CHIPSET(0x6858, TURKS_6858, TURKS)
CHIPSET(0x6859, TURKS_6859, TURKS)
CHIPSET(0x6760, CAICOS_6760, CAICOS)
CHIPSET(0x6761, CAICOS_6761, CAICOS)
CHIPSET(0x6762, CAICOS_6762, CAICOS)
CHIPSET(0x6763, CAICOS_6763, CAICOS)
CHIPSET(0x6764, CAICOS_6764, CAICOS)
CHIPSET(0x6765, CAICOS_6765, CAICOS)
CHIPSET(0x6766, CAICOS_6766, CAICOS)
CHIPSET(0x6767, CAICOS_6767, CAICOS)
CHIPSET(0x6768, CAICOS_6768, CAICOS)
CHIPSET(0x6770, CAICOS_6770, CAICOS)
CHIPSET(0x6771, CAICOS_6771, CAICOS)
CHIPSET(0x6772, CAICOS_6772, CAICOS)
CHIPSET(0x6778, CAICOS_6778, CAICOS)
CHIPSET(0x6779, CAICOS_6779, CAICOS)
CHIPSET(0x677B, CAICOS_677B, CAICOS)
CHIPSET(0x9900, ARUBA_9900, ARUBA)
CHIPSET(0x9901, ARUBA_9901, ARUBA)
CHIPSET(0x9903, ARUBA_9903, ARUBA)
CHIPSET(0x9904, ARUBA_9904, ARUBA)
CHIPSET(0x9905, ARUBA_9905, ARUBA)
CHIPSET(0x9906, ARUBA_9906, ARUBA)
CHIPSET(0x9907, ARUBA_9907, ARUBA)
CHIPSET(0x9908, ARUBA_9908, ARUBA)
CHIPSET(0x9909, ARUBA_9909, ARUBA)
CHIPSET(0x990A, ARUBA_990A, ARUBA)
CHIPSET(0x990B, ARUBA_990B, ARUBA)
CHIPSET(0x990C, ARUBA_990C, ARUBA)
CHIPSET(0x990D, ARUBA_990D, ARUBA)
CHIPSET(0x990E, ARUBA_990E, ARUBA)
CHIPSET(0x990F, ARUBA_990F, ARUBA)
CHIPSET(0x9910, ARUBA_9910, ARUBA)
CHIPSET(0x9913, ARUBA_9913, ARUBA)
CHIPSET(0x9917, ARUBA_9917, ARUBA)
CHIPSET(0x9918, ARUBA_9918, ARUBA)
CHIPSET(0x9919, ARUBA_9919, ARUBA)
CHIPSET(0x9990, ARUBA_9990, ARUBA)
CHIPSET(0x9991, ARUBA_9991, ARUBA)
CHIPSET(0x9992, ARUBA_9992, ARUBA)
CHIPSET(0x9993, ARUBA_9993, ARUBA)
CHIPSET(0x9994, ARUBA_9994, ARUBA)
CHIPSET(0x9995, ARUBA_9995, ARUBA)
CHIPSET(0x9996, ARUBA_9996, ARUBA)
CHIPSET(0x9997, ARUBA_9997, ARUBA)
CHIPSET(0x9998, ARUBA_9998, ARUBA)
CHIPSET(0x9999, ARUBA_9999, ARUBA)
CHIPSET(0x999A, ARUBA_999A, ARUBA)
CHIPSET(0x999B, ARUBA_999B, ARUBA)
CHIPSET(0x999C, ARUBA_999C, ARUBA)
CHIPSET(0x999D, ARUBA_999D, ARUBA)
CHIPSET(0x99A0, ARUBA_99A0, ARUBA)
CHIPSET(0x99A2, ARUBA_99A2, ARUBA)
CHIPSET(0x99A4, ARUBA_99A4, ARUBA)

23
Xext/dri2/pci_ids/radeon_pci_ids.h Normal file
View File

@@ -0,0 +1,23 @@
CHIPSET(0x4C57, RADEON_LW, RV200)
CHIPSET(0x4C58, RADEON_LX, RV200)
CHIPSET(0x4C59, RADEON_LY, RV100)
CHIPSET(0x4C5A, RADEON_LZ, RV100)
CHIPSET(0x5144, RADEON_QD, R100)
CHIPSET(0x5145, RADEON_QE, R100)
CHIPSET(0x5146, RADEON_QF, R100)
CHIPSET(0x5147, RADEON_QG, R100)
CHIPSET(0x5159, RADEON_QY, RV100)
CHIPSET(0x515A, RADEON_QZ, RV100)
CHIPSET(0x5157, RV200_QW, RV200)
CHIPSET(0x5158, RV200_QX, RV200)
CHIPSET(0x515E, RN50_515E, UNKNOWN)
CHIPSET(0x5969, RN50_5969, UNKNOWN)
CHIPSET(0x4136, RS100_4136, RS100)
CHIPSET(0x4336, RS100_4336, RS100)
CHIPSET(0x4137, RS200_4137, RS200)
CHIPSET(0x4337, RS200_4337, RS200)
CHIPSET(0x4237, RS250_4237, RS200)
CHIPSET(0x4437, RS250_4437, RS200)

237
Xext/dri2/pci_ids/radeonsi_pci_ids.h Normal file
View File

@@ -0,0 +1,237 @@
CHIPSET(0x6780, TAHITI_6780, TAHITI)
CHIPSET(0x6784, TAHITI_6784, TAHITI)
CHIPSET(0x6788, TAHITI_6788, TAHITI)
CHIPSET(0x678A, TAHITI_678A, TAHITI)
CHIPSET(0x6790, TAHITI_6790, TAHITI)
CHIPSET(0x6791, TAHITI_6791, TAHITI)
CHIPSET(0x6792, TAHITI_6792, TAHITI)
CHIPSET(0x6798, TAHITI_6798, TAHITI)
CHIPSET(0x6799, TAHITI_6799, TAHITI)
CHIPSET(0x679A, TAHITI_679A, TAHITI)
CHIPSET(0x679B, TAHITI_679B, TAHITI)
CHIPSET(0x679E, TAHITI_679E, TAHITI)
CHIPSET(0x679F, TAHITI_679F, TAHITI)
CHIPSET(0x6800, PITCAIRN_6800, PITCAIRN)
CHIPSET(0x6801, PITCAIRN_6801, PITCAIRN)
CHIPSET(0x6802, PITCAIRN_6802, PITCAIRN)
CHIPSET(0x6806, PITCAIRN_6806, PITCAIRN)
CHIPSET(0x6808, PITCAIRN_6808, PITCAIRN)
CHIPSET(0x6809, PITCAIRN_6809, PITCAIRN)
CHIPSET(0x6810, PITCAIRN_6810, PITCAIRN)
CHIPSET(0x6811, PITCAIRN_6811, PITCAIRN)
CHIPSET(0x6816, PITCAIRN_6816, PITCAIRN)
CHIPSET(0x6817, PITCAIRN_6817, PITCAIRN)
CHIPSET(0x6818, PITCAIRN_6818, PITCAIRN)
CHIPSET(0x6819, PITCAIRN_6819, PITCAIRN)
CHIPSET(0x684C, PITCAIRN_684C, PITCAIRN)
CHIPSET(0x6820, VERDE_6820, VERDE)
CHIPSET(0x6821, VERDE_6821, VERDE)
CHIPSET(0x6822, VERDE_6822, VERDE)
CHIPSET(0x6823, VERDE_6823, VERDE)
CHIPSET(0x6824, VERDE_6824, VERDE)
CHIPSET(0x6825, VERDE_6825, VERDE)
CHIPSET(0x6826, VERDE_6826, VERDE)
CHIPSET(0x6827, VERDE_6827, VERDE)
CHIPSET(0x6828, VERDE_6828, VERDE)
CHIPSET(0x6829, VERDE_6829, VERDE)
CHIPSET(0x682A, VERDE_682A, VERDE)
CHIPSET(0x682B, VERDE_682B, VERDE)
CHIPSET(0x682C, VERDE_682C, VERDE)
CHIPSET(0x682D, VERDE_682D, VERDE)
CHIPSET(0x682F, VERDE_682F, VERDE)
CHIPSET(0x6830, VERDE_6830, VERDE)
CHIPSET(0x6831, VERDE_6831, VERDE)
CHIPSET(0x6835, VERDE_6835, VERDE)
CHIPSET(0x6837, VERDE_6837, VERDE)
CHIPSET(0x6838, VERDE_6838, VERDE)
CHIPSET(0x6839, VERDE_6839, VERDE)
CHIPSET(0x683B, VERDE_683B, VERDE)
CHIPSET(0x683D, VERDE_683D, VERDE)
CHIPSET(0x683F, VERDE_683F, VERDE)
CHIPSET(0x6600, OLAND_6600, OLAND)
CHIPSET(0x6601, OLAND_6601, OLAND)
CHIPSET(0x6602, OLAND_6602, OLAND)
CHIPSET(0x6603, OLAND_6603, OLAND)
CHIPSET(0x6604, OLAND_6604, OLAND)
CHIPSET(0x6605, OLAND_6605, OLAND)
CHIPSET(0x6606, OLAND_6606, OLAND)
CHIPSET(0x6607, OLAND_6607, OLAND)
CHIPSET(0x6608, OLAND_6608, OLAND)
CHIPSET(0x6610, OLAND_6610, OLAND)
CHIPSET(0x6611, OLAND_6611, OLAND)
CHIPSET(0x6613, OLAND_6613, OLAND)
CHIPSET(0x6617, OLAND_6617, OLAND)
CHIPSET(0x6620, OLAND_6620, OLAND)
CHIPSET(0x6621, OLAND_6621, OLAND)
CHIPSET(0x6623, OLAND_6623, OLAND)
CHIPSET(0x6631, OLAND_6631, OLAND)
CHIPSET(0x6660, HAINAN_6660, HAINAN)
CHIPSET(0x6663, HAINAN_6663, HAINAN)
CHIPSET(0x6664, HAINAN_6664, HAINAN)
CHIPSET(0x6665, HAINAN_6665, HAINAN)
CHIPSET(0x6667, HAINAN_6667, HAINAN)
CHIPSET(0x666F, HAINAN_666F, HAINAN)
CHIPSET(0x6640, BONAIRE_6640, BONAIRE)
CHIPSET(0x6641, BONAIRE_6641, BONAIRE)
CHIPSET(0x6646, BONAIRE_6646, BONAIRE)
CHIPSET(0x6647, BONAIRE_6647, BONAIRE)
CHIPSET(0x6649, BONAIRE_6649, BONAIRE)
CHIPSET(0x6650, BONAIRE_6650, BONAIRE)
CHIPSET(0x6651, BONAIRE_6651, BONAIRE)
CHIPSET(0x6658, BONAIRE_6658, BONAIRE)
CHIPSET(0x665C, BONAIRE_665C, BONAIRE)
CHIPSET(0x665D, BONAIRE_665D, BONAIRE)
CHIPSET(0x665F, BONAIRE_665F, BONAIRE)
CHIPSET(0x9830, KABINI_9830, KABINI)
CHIPSET(0x9831, KABINI_9831, KABINI)
CHIPSET(0x9832, KABINI_9832, KABINI)
CHIPSET(0x9833, KABINI_9833, KABINI)
CHIPSET(0x9834, KABINI_9834, KABINI)
CHIPSET(0x9835, KABINI_9835, KABINI)
CHIPSET(0x9836, KABINI_9836, KABINI)
CHIPSET(0x9837, KABINI_9837, KABINI)
CHIPSET(0x9838, KABINI_9838, KABINI)
CHIPSET(0x9839, KABINI_9839, KABINI)
CHIPSET(0x983A, KABINI_983A, KABINI)
CHIPSET(0x983B, KABINI_983B, KABINI)
CHIPSET(0x983C, KABINI_983C, KABINI)
CHIPSET(0x983D, KABINI_983D, KABINI)
CHIPSET(0x983E, KABINI_983E, KABINI)
CHIPSET(0x983F, KABINI_983F, KABINI)
CHIPSET(0x9850, MULLINS_9850, MULLINS)
CHIPSET(0x9851, MULLINS_9851, MULLINS)
CHIPSET(0x9852, MULLINS_9852, MULLINS)
CHIPSET(0x9853, MULLINS_9853, MULLINS)
CHIPSET(0x9854, MULLINS_9854, MULLINS)
CHIPSET(0x9855, MULLINS_9855, MULLINS)
CHIPSET(0x9856, MULLINS_9856, MULLINS)
CHIPSET(0x9857, MULLINS_9857, MULLINS)
CHIPSET(0x9858, MULLINS_9858, MULLINS)
CHIPSET(0x9859, MULLINS_9859, MULLINS)
CHIPSET(0x985A, MULLINS_985A, MULLINS)
CHIPSET(0x985B, MULLINS_985B, MULLINS)
CHIPSET(0x985C, MULLINS_985C, MULLINS)
CHIPSET(0x985D, MULLINS_985D, MULLINS)
CHIPSET(0x985E, MULLINS_985E, MULLINS)
CHIPSET(0x985F, MULLINS_985F, MULLINS)
CHIPSET(0x1304, KAVERI_1304, KAVERI)
CHIPSET(0x1305, KAVERI_1305, KAVERI)
CHIPSET(0x1306, KAVERI_1306, KAVERI)
CHIPSET(0x1307, KAVERI_1307, KAVERI)
CHIPSET(0x1309, KAVERI_1309, KAVERI)
CHIPSET(0x130A, KAVERI_130A, KAVERI)
CHIPSET(0x130B, KAVERI_130B, KAVERI)
CHIPSET(0x130C, KAVERI_130C, KAVERI)
CHIPSET(0x130D, KAVERI_130D, KAVERI)
CHIPSET(0x130E, KAVERI_130E, KAVERI)
CHIPSET(0x130F, KAVERI_130F, KAVERI)
CHIPSET(0x1310, KAVERI_1310, KAVERI)
CHIPSET(0x1311, KAVERI_1311, KAVERI)
CHIPSET(0x1312, KAVERI_1312, KAVERI)
CHIPSET(0x1313, KAVERI_1313, KAVERI)
CHIPSET(0x1315, KAVERI_1315, KAVERI)
CHIPSET(0x1316, KAVERI_1316, KAVERI)
CHIPSET(0x1317, KAVERI_1317, KAVERI)
CHIPSET(0x1318, KAVERI_1318, KAVERI)
CHIPSET(0x131B, KAVERI_131B, KAVERI)
CHIPSET(0x131C, KAVERI_131C, KAVERI)
CHIPSET(0x131D, KAVERI_131D, KAVERI)
CHIPSET(0x67A0, HAWAII_67A0, HAWAII)
CHIPSET(0x67A1, HAWAII_67A1, HAWAII)
CHIPSET(0x67A2, HAWAII_67A2, HAWAII)
CHIPSET(0x67A8, HAWAII_67A8, HAWAII)
CHIPSET(0x67A9, HAWAII_67A9, HAWAII)
CHIPSET(0x67AA, HAWAII_67AA, HAWAII)
CHIPSET(0x67B0, HAWAII_67B0, HAWAII)
CHIPSET(0x67B1, HAWAII_67B1, HAWAII)
CHIPSET(0x67B8, HAWAII_67B8, HAWAII)
CHIPSET(0x67B9, HAWAII_67B9, HAWAII)
CHIPSET(0x67BA, HAWAII_67BA, HAWAII)
CHIPSET(0x67BE, HAWAII_67BE, HAWAII)
CHIPSET(0x6900, ICELAND_, ICELAND)
CHIPSET(0x6901, ICELAND_, ICELAND)
CHIPSET(0x6902, ICELAND_, ICELAND)
CHIPSET(0x6903, ICELAND_, ICELAND)
CHIPSET(0x6907, ICELAND_, ICELAND)
CHIPSET(0x6920, TONGA_, TONGA)
CHIPSET(0x6921, TONGA_, TONGA)
CHIPSET(0x6928, TONGA_, TONGA)
CHIPSET(0x6929, TONGA_, TONGA)
CHIPSET(0x692B, TONGA_, TONGA)
CHIPSET(0x692F, TONGA_, TONGA)
CHIPSET(0x6930, TONGA_, TONGA)
CHIPSET(0x6938, TONGA_, TONGA)
CHIPSET(0x6939, TONGA_, TONGA)
CHIPSET(0x9870, CARRIZO_, CARRIZO)
CHIPSET(0x9874, CARRIZO_, CARRIZO)
CHIPSET(0x9875, CARRIZO_, CARRIZO)
CHIPSET(0x9876, CARRIZO_, CARRIZO)
CHIPSET(0x9877, CARRIZO_, CARRIZO)
CHIPSET(0x7300, FIJI_, FIJI)
CHIPSET(0x67E0, POLARIS11_, POLARIS11)
CHIPSET(0x67E1, POLARIS11_, POLARIS11)
CHIPSET(0x67E3, POLARIS11_, POLARIS11)
CHIPSET(0x67E7, POLARIS11_, POLARIS11)
CHIPSET(0x67E8, POLARIS11_, POLARIS11)
CHIPSET(0x67E9, POLARIS11_, POLARIS11)
CHIPSET(0x67EB, POLARIS11_, POLARIS11)
CHIPSET(0x67EF, POLARIS11_, POLARIS11)
CHIPSET(0x67FF, POLARIS11_, POLARIS11)
CHIPSET(0x67C0, POLARIS10_, POLARIS10)
CHIPSET(0x67C1, POLARIS10_, POLARIS10)
CHIPSET(0x67C2, POLARIS10_, POLARIS10)
CHIPSET(0x67C4, POLARIS10_, POLARIS10)
CHIPSET(0x67C7, POLARIS10_, POLARIS10)
CHIPSET(0x67C8, POLARIS10_, POLARIS10)
CHIPSET(0x67C9, POLARIS10_, POLARIS10)
CHIPSET(0x67CA, POLARIS10_, POLARIS10)
CHIPSET(0x67CC, POLARIS10_, POLARIS10)
CHIPSET(0x67CF, POLARIS10_, POLARIS10)
CHIPSET(0x67DF, POLARIS10_, POLARIS10)
CHIPSET(0x98E4, STONEY_, STONEY)
CHIPSET(0x6980, POLARIS12_, POLARIS12)
CHIPSET(0x6981, POLARIS12_, POLARIS12)
CHIPSET(0x6985, POLARIS12_, POLARIS12)
CHIPSET(0x6986, POLARIS12_, POLARIS12)
CHIPSET(0x6987, POLARIS12_, POLARIS12)
CHIPSET(0x6995, POLARIS12_, POLARIS12)
CHIPSET(0x6997, POLARIS12_, POLARIS12)
CHIPSET(0x699F, POLARIS12_, POLARIS12)
CHIPSET(0x694C, VEGAM_, VEGAM)
CHIPSET(0x694E, VEGAM_, VEGAM)
CHIPSET(0x6860, VEGA10_, VEGA10)
CHIPSET(0x6861, VEGA10_, VEGA10)
CHIPSET(0x6862, VEGA10_, VEGA10)
CHIPSET(0x6863, VEGA10_, VEGA10)
CHIPSET(0x6864, VEGA10_, VEGA10)
CHIPSET(0x6867, VEGA10_, VEGA10)
CHIPSET(0x6868, VEGA10_, VEGA10)
CHIPSET(0x687F, VEGA10_, VEGA10)
CHIPSET(0x686C, VEGA10_, VEGA10)
CHIPSET(0x69A0, VEGA12_, VEGA12)
CHIPSET(0x69A1, VEGA12_, VEGA12)
CHIPSET(0x69A2, VEGA12_, VEGA12)
CHIPSET(0x69A3, VEGA12_, VEGA12)
CHIPSET(0x69AF, VEGA12_, VEGA12)
CHIPSET(0x15DD, RAVEN_, RAVEN)

2
Xext/dri2/pci_ids/virtio_gpu_pci_ids.h Normal file
View File

@@ -0,0 +1,2 @@
CHIPSET(0x0010, VIRTGL, VIRTGL)
CHIPSET(0x1050, VIRTGL, VIRTGL)

1
Xext/dri2/pci_ids/vmwgfx_pci_ids.h Normal file
View File

@@ -0,0 +1 @@
CHIPSET(0x0405, SVGAII, SVGAII)

1
Xext/meson.build
View File

@@ -66,3 +66,4 @@ if build_xorg
endif
subdir('damage')
subdir('dri2')